• Title/Summary/Keyword: UXGA

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Design of an Image Processor for UXGA Class LCD

  • Cho, Hwa-Hyun;Choi, Myung-Ryul
    • Journal of Information Display
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    • v.2 no.2
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    • pp.13-21
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    • 2001
  • We propose a universal image processor for a-Si TFT LCD of UXGA class that can display the full screen on the LCD panel with low resolution of video sources such as NTSC, VGA, SVGA, XGA, and SXGA by using the proposed interpolation filter. In addition, we propose a real-time contrast controller for image improvement of multi-gray scale image. The operation of the proposed methods has been verified using Synopsys VHDL and computer simulation. Results show that the proposed methods might be suitable for a UXGA LCD controller for real-time image improvement.

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Implementation and Performance Evaluation of a Video-Equipped Real-Time Fire Detection Method at Different Resolutions using a GPU (GPU를 이용한 다양한 해상도의 비디오기반 실시간 화재감지 방법 구현 및 성능평가)

  • Shon, Dong-Koo;Kim, Cheol-Hong;Kim, Jong-Myon
    • Journal of the Korea Society of Computer and Information
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    • v.20 no.1
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    • pp.1-10
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    • 2015
  • In this paper, we propose an efficient parallel implementation method of a widely used complex four-stage fire detection algorithm using a graphics processing unit (GPU) to improve the performance of the algorithm and analyze the performance of the parallel implementation method. In addition, we use seven different resolution videos (QVGA, VGA, SVGA, XGA, SXGA+, UXGA, QXGA) as inputs of the four-stage fire detection algorithm. Moreover, we compare the performance of the GPU-based approach with that of the CPU implementation for each different resolution video. Experimental results using five different fire videos with seven different resolutions indicate that the execution time of the proposed GPU implementation outperforms that of the CPU implementation in terms of execution time and takes a 25.11ms per frame for the UXGA resolution video, satisfying real-time processing (30 frames per second, 30fps) of the fire detection algorithm.

LTPS Technology in ERSO

  • Liu, David N.;Yeh, Yung-Hui
    • 한국정보디스플레이학회:학술대회논문집
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    • 2004.08a
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    • pp.124-128
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    • 2004
  • A Poly-Si and a ITO films with surface roughness 1.8 nm and 0.5 nm of root mean square ($R_{rms}$ vakue) values were developed, respectively. A 3 inch UXGA LTPS TFT-LCD with 667 ppi resolution and a 10 inch VGA LTPS OLED have been developed and demonstrated using PMOS technology.

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Efficient Hardware Architecture for Histogram Equalization Algorithm for Image Enhancement (화질 개선을 위한 히스토그램 평활화 알고리즘의 효율적인 하드웨어 구현)

  • Kim, Ji-Hyung;Park, Hyun-Sang
    • Journal of the Korea Academia-Industrial cooperation Society
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    • v.10 no.5
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    • pp.967-971
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    • 2009
  • The histogram equalization algorithm is the most crucial algorithm for image enhancement. Since its direct hardware implementation always requires a divider or multiplier, its implementation cost tends to increas as the image resolution is increased or diverse image resolutions are handled. In this paper, we propose a divider-free reconstruction of histogram equalization algorithm and the corresponding hardware architecture. The logic synthesis results show that the proposed scheme can reduce the logic gate count by 84.2% compared to the conventional implementation example when the UXGA resolution is considered.

A Comparative Study on the Quantitative Analysis of the Flicker Phenomena in the Amorphous-Silicon and Poly-Silicon TFT-LCDs (비정질 및 다결정 실리콘 TFT-LCD에서의 플리커(flicker) 현상 비교 분석 연구)

  • Son, Myung-Sik;Song, Min-Soo;Yoo, Keon-Ho;Jang, Jin
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.40 no.1
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    • pp.20-28
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    • 2003
  • In this paper, we present results of the comparative analysis of the flicker phenomena in the poly-Si TFT-LCD and a-Si:H TFT-LCD arrays for the development and manufacturing of wide-area and high-quality TFT-LCD displays. We used four different types of TFTs; a-Si:H TFT, excimer laser annealed (ELA) poly-Si TFT, silicide mediated crystallization (SMC) poly-Si TFT, and counter-doped lateral body terminal (LBT), poly-Si TFT. We defined the electrical quantity of the flicker so that we could compare the flickers quantitatively for four different 40" UXGA TFT-LCDs. We identify three factors contributing to the flicker, such as charging time, kickback voltage and leakage current, and analyze how much each of three factors give rise to the flincker in the different TFT-LCD arrays. In addition, we suggest and show that, in the case of the poly-Si TFT-LCD arrays, the low-level (minimum) gate voltages should be carefully chosen to minimize the flicker because of their larger leakage currents compared with a-Si TFT-LCD arrays.

PVA Technology for High Performance LCD Monitors

  • Kim, Kyeong-Hyeon;Souk, Jun-Hyung
    • 한국정보디스플레이학회:학술대회논문집
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    • 2000.01a
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    • pp.1-4
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    • 2000
  • We have developed a high performance vertical alignment TFT-LCD, that shows a high light transmittance, and wide viewing angle characteristics with an unusually high contrast ratio. In order to optimize the electro-optical properties we have studied the effect of cell parameters, multi-domain structure and retardation film compensation. With the optimized cell parameters and process conditions, we have achieved a 24" wide UXGA TFT-LCD monitor (16:10 aspect ratio 1920X1200) showing a contrast ratio over 500:1, panel transmittance near 4.5%, response time near 27 ms, and viewing angle higher than 80 degree in all directions.

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Design of an 8-bit 230MSPS Analog Flat Panel Interface for TFT-LCD Driver (TFT-LCD 드라이버를 위한 8-bit 230MSPS Analog Flat Panel InterFACE의 설계)

  • Yun, Seong-Uk;Im, Hyeon-Sik;Song, Min-Gyu
    • Journal of the Institute of Electronics Engineers of Korea SD
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    • v.39 no.2
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    • pp.1-6
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    • 2002
  • In this paper, an Analog Flat Panel interface(AFPI) which supports for UXGa(Ultar extended Graphics Array)-Compatible TFT LCD Driver is designed. The Proposed AFPI is composed of 8-b ADC, Automatic Gain Control(AGC), Low-Jitter PLL. In order to obtain a high speed and low power consumption, an efficient architecture of 8-bit ADC is proposed, whose FR(Folding Rate) is 8, NFB(Number of Folding Block) is 2, and IR (Interpolating Rate) is 16. We can get high SNDR by adopting distributed track and hold circuits. Also a programmable AGC which is possible to control gain and clamp, and a low-jitter PLL are proposed. The chip has been fabricated with 0.25${\mu}{\textrm}{m}$ 1-poly S-metal n-well CMOS technology. The effective chip area is 3.6mm $\times$ 3.2mm and it dissipates about 602㎽ at 2.5V power supply. The INL and DNL are within $\pm$ 1LSB. The measured SNDR is about 43㏈, when the input frequency is 10MHz at 200MHz clock frequency.

PVA Technology for High Performance LCD Monitors

  • Kim, Kyung-Hyun;Song, Jang-Geun;Park, Seung-Bam;Lyu, Jae-Jin;Souk, Jun-Hyung;Lee, Khe-Hyun
    • Journal of Information Display
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    • v.1 no.1
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    • pp.3-8
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    • 2000
  • We have developed a high performance vertical alignment TFT-LCD (Thin Film Transistor Liquid Crystal Display), that shows a high light transmittance, and wide viewing angle characteristics with an unusually high contrast ratio. In order to optimize the electro-optical properties we have studied the effect of cell parameters, multi-domain structure and retardation film compensation. With the optimized cell parameters and process conditions, we have achieved a 24" wide UXGA TFTLCD monitor (16:10 aspect ratio 1920X1200) showing a contrast ratio of over 500:1, panel transmittance near 4.5%, response time near 25 ms, and viewing angle higher than 80 degree in all directions.

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Cu as an Electrode Material in TFT-LCD Products

  • Park, C.W.;Cho, W.H.;Kim, K.T.;Choi, H.C.;Oh, C.H.
    • 한국정보디스플레이학회:학술대회논문집
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    • 2003.07a
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    • pp.661-663
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    • 2003
  • In this paper, production of TFT-LCD adopting Cu electrode, in spite of low resistivity, which was not commercially applied to TFT LCD products because of processibility, reliability problems etc. was mentioned. Based on the test result of etch and strip process of Cu electrode, the TFT device using Cu material shows the same characteristics as the conventional TFT devices. We describe the realization of a 20.1" UXGA model which was firstly applied to Cu electrode.

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LVDS I/O Cells with Rail-to-Rail Input Receiver

  • Lim, Byong-Chan;Lee, Sung-Ryong;Kwon, Oh-Kyong
    • 한국정보디스플레이학회:학술대회논문집
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    • 2002.08a
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    • pp.567-570
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    • 2002
  • The LVDS (Low Voltage Differential Signaling) I/O cells, fully compatible with ANSI TIA/ EIA-644 LVDS standard, are designed using a 0.35${\mu}m$ standard CMOS technology. With a single 3V supply, the core cells operate at 1.34Gbps and power consumption of the output driver and the input receiver is 10. 5mW and 4.2mW, respectively. In the output driver, we employ the DCMFB (Dynamic Common-Mode FeedBack) circuit which can control the DC offset voltage of differential output signals. The SPICE simulation result of the proposed output driver shows that the variation of the DC offset voltage is 15.6% within a permissible range. In the input receiver, the proposed dual input stage with a positive feedback latch covers rail-to-rail input common-mode range and enables a high-speed, low-power operation. 5-channels of the proposed LVDS I/O pair can handle display data up to 8-bit gray scale and UXGA resolution.

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