• 전력전자학회:학술대회논문집
• /
• 전력전자학회 2017년도 전력전자학술대회
• /
• pp.40-41
• /
• 2017

New adaptive SR (synchronous rectification) control method is proposed offering high efficiency in entire load conditions for resonant converters, in this paper. Unlike the conventional SR control method where turn-on time of the MOSFETs is varied depending on load conditions due to the stray inductance induced by a lead frame of MOSFET or PCB patterns, the proposed method automatically maintains a time interval between turn-off instance of a MOSFET and zero current instance of a body diode of the MOSFET as a predetermined time, in each switching cycle. Therefore, optimized turn-on time of the MOSFET can be achieved regardless of the leakage inductance. In this paper, the operational principle of proposed control method has been discussed. It has been tested on LLC resonant converter with 240 W to verify the proposed control method.

• 전력전자학회:학술대회논문집
• /
• 전력전자학회 2002년도 추계학술대회 논문집
• /
• pp.227-230
• /
• 2002

The switching device in an inductive circuit is stressed by the over-voltage at the turn-off time. Thus if the peak value of the over-voltage is not properly limited, the switching device may be broken. Therefore, the snubber circuit should be added to protect the switching device from the over-voltage. The circuit designer must be familiar with the design of the snubber This paper tests the possibility that TVS instead of the conventional snubber can be applied to the protection circuit of the switching device without using the complicated design equations, and shows that the rating of TVS can be easily selected by considering only several parameters of TVS. The experimental results show the reduced switching voltage of the switching device at the turn-off time.

• 대한전기학회논문지:전기물성ㆍ응용부문C
• /
• 제51권3호
• /
• pp.99-104
• /
• 2002

lateral insulated gate bipolar transistors(LIGBTs) are extensively used in high voltage power IC application due to their low forward voltage drops. One of the main disadvantages of the LIGBT is its scow switching speed when compared to the LDMOSFET. And the LIGBT with reverse channel structure is lower current capability than the conventional LIGBT at the forward conduction mode. In this paper, the LIGBT which included p+ ring and p-channel gate is presented at the reverie channel structure. The presented LIGBT structure is proposed to suppress the latch up, efficiently and to improve the turn off time. It is shown to improve the current capability too. It is verified 2-D simulator, MEDICI. It is shown that the latch up current of new LIGBT is 10 times than that of the conventional LIGBT Additionally, it is shown that the turn off characteristics of the proposed LIGBT is i times than that of the conventional LIGBT. It is net presented the tail current of turn off characteristics at the proposed structure. And the presented LIGBT is not n+ buffer layer because it includes p channel gate and p+ ring.

• 한국전기전자재료학회논문지
• /
• 제13권5호
• /
• pp.371-375
• /
• 2000

In this paper a new conductivity modulated power transistor called the Lateral Insulated Gated Bipolar Transistor which included n+ ring and p-channel gate is presented. A new lateral IGBT structure is proposed to suppress latch-up and to improve turn off time by imploying n+ ring and p-channel gate and verified by MEDICI. The simulated I-V characteristics at $V_{G}$=15V show that the latch up occurs at $V_{A}$=18V and 6.9$\times$10$^{-5}$ A/${\mu}{\textrm}{m}$ for the proposed LIGBT while the conventional LIGBT latches at $V_{A}$=1.3V and 1.96${\mu}{\textrm}{m}$10$^{-5A}$${\mu}{\textrm}{m}$. It is shown that turn off characteristic of new LIGBT is 8 times than that of conventional LIGBT. And noble LIGBT is not n+ buffer layer because that It includes p channel gate and n+ ring. Therefore Mask for the buffer layer isn’t needed. The concentration of n+ ring is and the numbers of n+ ring and p channel gate are three for the optimal design.n.n.n.n.

• 대한전기학회:학술대회논문집
• /
• 대한전기학회 1996년도 하계학술대회 논문집 C
• /
• pp.1547-1549
• /
• 1996

The electrical and optical switching characteristics of gold-doped silicon p-i-n diodes have been investigated. The device shows a dark switching voltage of about 500 V. The switching voltage decreases rapidly when the illumination level is increased. The differential sensitivity of optical gating over linear region is $d(V_{Th}/V_{Tho})/dP_{Ph}$=0.25/uW. The turn-on delay time and the turn-on rise time decrease with increasing optical pulse power. The turn-off delay and the fall time are negligible.

• Journal of Advanced Marine Engineering and Technology
• /
• 제13권1호
• /
• pp.57-68
• /
• 1989

This paper treats the analytical and experimental studies on the improvement of commutating circuit for the speed control of DC motor. A simple circuit composed of R, L and C elements is proposed here for switching off power SCR carrying the load current. The real important in this chopper circuit is to determine the reasonable values of commutating circuit constants. In this paper, the reasonable values of the commutating circuit constants are basically determined on a view point of commutating performances in the given circuit model and must satisfy the following conditions. The first, the peak commutating current should be larger than the anticipated maximum load current. The second, the circuit turn-off time (tc) must be longer than the SCR turn-off time (tq). The third, the resistor should be enough large to permit the current to be neglected in the analysis of the commutation circuit, as well as be enough small to permit to charge the capacity voltage (Ec) to the half the value of source voltage (E) before the next communication cycle is initiated. The last, the period of chopping signal must be the least possible multiple of the damping vibration period of commutating circuit. The improved chopper circuit used in the experiment under unloaded condition was composed to meet the reasonable conditions mentioned above, and a successful commuting performance was achieved without failure. Several types of microprocessor having a different value of CPU speed individually have been applied to the experiment under the loaded conditions. Also it shows that the faster the speed of CPU is, the more stable the commutation turns out.

• 대한전기학회:학술대회논문집
• /
• 대한전기학회 2006년도 추계학술대회 논문집 전기물성,응용부문
• /
• pp.147-148
• /
• 2006

Sl-Thyristor는 기존의 Power semlconductor인 단일 IGBT,MOSFET과 비교하여 높은 정격 전압과 대전류의 소호가 가능하며 빠른 turn on swithcing time을 가지는 특성이 있다. 하지만 게이트 드라이버를 이용한 Sl-Thyristor의 turn on 구동시에는 전압구동의 특성과 turn 0ff시에는 전류 구동의 특성에 가까운 구동 특성이 요구되기 때문에 스위칭 요구 특성에 맞는 게이트 드라이버의 설계 및 제어가 쉽지 않다. 본 논문은 펄스 파워 어플리케이션으로 Sl-Thyristor(PT-201 5kV/100A)를 사용하여 pulsed power moduiator용 Sl-Thyristor의 게이트 드라이버의 요구인 빠른 turn on switching 특성과 turn off 시 Si-Thyristor 내의 전하를 빨리 제거하기 위한 조건을 제시하고 있다.

• Physical Therapy Rehabilitation Science
• /
• 제7권2호
• /
• pp.54-60
• /
• 2018

Objective: Persons with chronic stroke fall more often than healthy elderly individuals. The Timed Up and Go test (TUG) is used as a fall prediction tool, but only provides a result for the total measurement time. This study aimed to determine the optimal cut-off values for each of the 6 components of the TUG. Design: Retrospective study. Methods: Thirty persons with chronic stroke participated in the study. TUG evaluation was performed using a wearable miniaturized inertial sensor. Sensitivity, specificity, and predictive values were calculated using the Receiver Operating Characteristic (ROC) curve analysis for the measured values in each section. Optimal values for fall risk classification were determined. Logistic regression analysis was used to investigate the risk of future falls based on TUG. Results: The cut-off values of the 6 sections of the TUG were determined, as follows: sit-to-stand >2.00 seconds (p<0.05), forward gait >4.68 seconds (p<0.05), mid-turn >3.82 seconds (p<0.05), return gait >4.81 seconds (p<0.05), end-turn >2.95 seconds (p<0.05), and stand-to-sit >2.13 seconds (p<0.05). The risk of falling increased by 2.278 times when the mid-turn value was >3.82 seconds (p<0.05). Conclusions: The risk of falls increased by 2.28 times when the value of the mid-turn interval exceeded 3.82 seconds. Therefore, when interpreting TUG results, the predictive accuracy for falls will be higher when the measurement time for each section is analyzed, together with the total time for TUG.

• 전기전자학회논문지
• /
• 제12권2호
• /
• pp.110-117
• /
• 2008

본 연구는 전력용 스위칭 소자로 널리 활용되고 있는 IGBT(Insulated Gate Bipolar Transistor)소자로서 NPT(Non Punch Through) IGBT 구조에 기반 한 새로운 구조의 IGBT를 제안하였다. 제안된 구조는 기존 IGBT 구조의 P-베이스 영역 우측 부분에 N+를 도입함으로 N-드리프트 영역의 정공분포를 N+영역으로 밀집시켜 턴-오프 시 정공의 흐름을 개선, 기존 구조보다 더 빠른 턴-오프 시간과 더 낮은 순방향 전압강하를 갖는 구조이다. 또한 P+를 게이트 우측 하단에 형성함으로써 순방향 전압 강하 특성을 개선시키기 위해 도입한 캐리어 축적 층인 N+에 의해 발생하는 낮은 래치-업 특성과 낮은 항복 전압 특성을 개선시킨 구조이다. 시뮬레이션 결과 제한된 구조의 턴-오프와 순방향 전압강하는 기존 구조대비 각각 0.3us, 0.5V 향상된 특성을 보였다.

• 대한전기학회:학술대회논문집
• /
• 대한전기학회 1999년도 추계학술대회 논문집 학회본부 C
• /
• pp.932-934
• /
• 1999

In this paper, the new IGBT structures with trap injection are proposed to improve switching characteristics of the conventional SOI LIGBT. The simulations are used in order to investigate the effects of the position, width and concentration of trap injection region using 2D device simulator MEDICI. And, their electrical characteristics are analyze and the optimum design parameters are extracted. As a result of simulation, the turn off time for the proposed LIGBT model A by the trap injection is $0.78{\mu}s$. And, the latch up voltage is 3.4V and forward blocking voltage is 168V which are superior to that of conventional structure. In addition, the proposed model is achieved more efficient in switching time and process effort. Therefore, It is shown that the trap injection is very effective to reduce the turn off time with a little increasing of on-state voltage drop if its design and process parameters are optimized.