• Journal of Magnetics
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• v.14 no.1
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• pp.11-14
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• 2009

We investigated the I-V curves and differential tunneling conductance of two, CoFeB/MgO/CoFeB-based, magnetic tunnel junctions (MTJs): one with a low tunneling magnetoresistance (TMR; 22%) and the other with a high TMR (352%). This huge TMR difference was achieved by different MgO sputter conditions rather than by different annealing or deposition temperature. In addition to the TMR difference, the junction resistances were much higher in the low-TMR MTJ than in the high-TMR MTJ. The low-TMR MTJ showed a clear parabolic behavior in the dI/dV-V curve. This high resistance and parabolic behavior were well explained by the Simmons' simple barrier model. However, the tunneling properties of the high-TMR MTJ could not be explained by this model. The characteristic tunneling properties of the high-TMR MTJ were a relatively low junction resistance, a linear relation in the I-V curve, and conduction dips in the differential tunneling conductance. We explained these features by applying the coherent tunneling model.

• Proceedings of the Korean Magnestics Society Conference
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• 2003.12a
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• pp.85-85
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• 2003

• Journal of the Korean Magnetics Society
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• v.26 no.6
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• pp.201-205
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• 2016

In this report, we measured the impedance spectrum in TMR device, and the relaxation behavior of the real and imaginary impedance spectrum was analyzed by using the equilibrant circuit of tunneling capacitance ($C_T$) and tunneling resistance ($R_T$). The relaxation frequency was increased with AC voltage in both the parallel and antiparallel alignment of two magnetic layers. The $R_T$ with AC voltage showed the typical bias voltage dependence. However, the $C_T$ showed large value than the expected geometrical capacitance. The huge increase of $C_T$ was affecting as a limiting factor for the high speed operation of TMR devices. Thus, the supercapacitance of $C_T$ should be considered to design the high speed TMR devices.

• JSTS:Journal of Semiconductor Technology and Science
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• v.16 no.5
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• pp.630-634
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• 2016

We report the computer aided design results for a GaSb/InAs broken-gap gate all around nanowire tunneling FET (TFET). In designing, the semi-empirical tight-binding (TB) method using $sp3d5s^*$ is used as band structure model to produce the bulk properties. The calculated band structure is cooperated with open boundary conditions (OBCs) and a three-dimensional $Schr{\ddot{o}}dinger$-Poisson solver to execute quantum transport simulators. We find an device configuration for the operation voltage of 0.3 V which exhibit desired low sub-threshold swing (< 60 mV/dec) by adopting receded gate configuration while maintaining the high current characteristic ($I_{ON}$ > $100 {\mu}A/{\mu}m$) that broken-gap TFETs normally have.

• JSTS:Journal of Semiconductor Technology and Science
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• v.11 no.4
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• pp.272-277
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• 2011

The ambipolar behavior of tunneling field-effect transistors (TFETs) has been investigated quantitatively by introducing a novel parameter: ambipolarity factor (${\nu}$). It has been found that the malfunction of TFET can result from the ambipolar state which is not on- or off- state. Therefore, the effect of ambipolar behavior on the device performance should be parameterized quantitatively, and this has been successfully evaluated as a function of device structure, gate oxide thickness, supply voltage, drain doping concentration and body doping concentration by using ${\nu}$.

• Applied Science and Convergence Technology
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• v.23 no.3
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• pp.128-133
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• 2014

We study the ballistic spin transport properties in a two-dimensional electron gas system in the presence of magnetic barriers using a transfer matrix method. We concentrate on the size-effect of the magnetic barriers parallel to a two-dimensional electron gas plane. We calculate the transmission probability of the ballistic spin transport in the magnetic barrier structure while varying the width of the magnetic barriers. It is shown that resonant tunneling oscillation is affected by the width and height of the magnetic barriers sensitively as well as by the inter-spacing of the barriers. We also consider the effect of additional electrostatic modulation on the top of the magnetic barriers, which could enhance the current spin polarization. Because all-semiconductor-based devices are free from the resistance mismatch problem, a resonant tunneling structure using the two-dimensional electron gas system with electric-magnetic modulation would play an important role in future spintronics applications. From the results here, we provide information on the physical parameters of a device to produce well-defined spin-polarized current.

• Proceeding of EDISON Challenge
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• 2013.04a
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• pp.240-242
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• 2013

In this paper, novel Carbon Nanotube Gate-Elongated Tunneling Field Transistor(CNT G-E TFET) is proposed. This proposed device is designed to decrease off-current around 2~6 orders of magnitude compared to the gate-channel size matched TFET. Mechanism of CNT G-E TFET creates additional steps in energy band structure so that off-current can be reduced. Since CNT TFETs show a great probability for tunneling processes and they are beneficial for the overall device performance in terms of switching speed and power consumption, CNT G-E TFET looks pretty much promising.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2013.10a
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• pp.713-716
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• 2013

The device performances of N-channel Tunneling FET have been characterized with different intrinsic length between drain and gate($L_{in}$), drain and source doping, permittivity and oxide thickness when the total effective channel length is constant. N-channel Tunneling FET of SOI structure have been used in characterization. $L_{in}$ was from 30nm to 70nm, dose concentration of drain and source were from $2{\times}10^{12}cm^{-2}$ to $2{\times}10^{15}cm^{-2}$ and from $1{\times}10^{14}cm^{-2}$ to $3{\times}10^{15}cm^{-2}$, permittivity was from 3.9 to 29, and oxide thickness was from 3nm to 9nm. The device performances were characterized by Subthreshold slope(S-slope), On/off ratio, and leakage current. From the simulation results, the leakage current have been reduced for long $L_{in}$ and low drain doping. S-slope have been reduced for high source doping, high permittivity and thin oxide thickness. With considering the leakage current and S-slope, it is desirable that are long $L_{in}$, low drain doping, high source doping, high permittivity and thin oxide thickness to optimize device performance in n-channel Tunneling FET.

• Journal of Electrical Engineering and Technology
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• v.9 no.5
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• pp.1670-1676
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• 2014

This paper presents the modeling of Single Electron Transistor (SET) based on Physical model of a device and its equivalent circuit. The physical model is derived from Schrodinger equation. The wave function of the electrode is calculated using Hartree-Fock method and the quantum dot calculation is obtained from WKB approximation. The resulting wave functions are used to compute tunneling rates. From the tunneling rate the current is calculated. The equivalent circuit model discuss about the effect of capacitance on tunneling probability and free energy change. The parameters of equivalent circuit are extracted and optimized using genetic algorithm. The effect of tunneling probability, temperature variation effect on tunneling rate, coulomb blockade effect and current voltage characteristics are discussed.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2016.05a
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• pp.445-447
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• 2016

Performance comparison between Tunneling Field-Effect Transistors (TFETs) was examined when three types of device parameter of double-gate TFET (DG-TFET) and single-gate TFET (SG-TFET) are varied. When the channel length is over 30 nm, silicon thickness is below 20 nm, and a gate insulator thickness decreases, the performance of $I_{on}$ and SS in SG-TFETs and DG-TFETs enhances. It shows that the performance of the DG-TFETs is improved than that of SG-TFETs at three types of device parameter.