• Title/Summary/Keyword: Tunnel field-effect transistor

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Potential Model for L shaped Tunnel Field-Effect-Transistor

  • Najam, Faraz;Yu, Yun Seop
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2016.10a
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    • pp.170-171
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    • 2016
  • A surface potential model is introduced for L-shaped tunnel field-effect-transistor(L-TFET). Excellent agreement is obtained when model results are compared with TCAD data.

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An Analytical Modeling and Simulation of Dual Material Double Gate Tunnel Field Effect Transistor for Low Power Applications

  • Arun Samuel, T.S.;Balamurugan, N.B.
    • Journal of Electrical Engineering and Technology
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    • v.9 no.1
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    • pp.247-253
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    • 2014
  • In this paper, a new two dimensional (2D) analytical modeling and simulation for a Dual Material Double Gate tunnel field effect transistor (DMDG TFET) is proposed. The Parabolic approximation technique is used to solve the 2-D Poisson equation with suitable boundary conditions and analytical expressions for surface potential and electric field are derived. This electric field distribution is further used to calculate the tunnelling generation rate and thus we numerically extract the tunnelling current. The results show a significant improvement in on-current characteristics while short channel effects are greatly reduced. Effectiveness of the proposed model has been confirmed by comparing the analytical results with the TCAD simulation results.

Source-Overlapped Gate Length Effects at Tunneling current of Tunnel Field-Effect Transistor (소스영역으로 오버랩된 게이트 길이 변화에 따른 터널 트랜지스터의 터널링 전류에 대한 연구)

  • Lee, Ju-Chan;Ahn, Tae-Jun;Sim, Un-Sung;Yu, Yun Seop
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2016.10a
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    • pp.611-613
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    • 2016
  • The characteristics of tunnel field-effect transistor(TFET) structure with source-overlapped gate was investigated using a TCAD simulations. Tunneling is mostly divided into line-tunneling and point-tunneling, and line-tunneling is higher performance than point-tunneling in terms of subthreshold swing(SS) and on-current. In this paper, from the simulation results of source-overlapped gate length effects at silicon(Si), germanium(Ge), Si-Ge hetero TFET structure, the guideline of optimal structure with highest performance are proposed.

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Investigation of Junction-less Tunneling Field Effect Transistor (JL-TFET) with Floating Gate

  • Ali, Asif;Seo, Dongsun;Cho, Il Hwan
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.17 no.1
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    • pp.156-161
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    • 2017
  • This work presents a novel structure for junction-less tunneling field effect transistor (JL-TFET) with a floating gate over the source region. Introduction of floating gate instead of fixed metal gate removes the limitation of fabrication process suitability. The proposed device is based on a heavily n-type-doped Si-channel junction-less field effect transistor (JLFET). A floating gate over source region and a control-gate with optimized metal work-function over channel region is used to make device work like a tunnel field effect transistor (TFET). The proposed device has exhibited excellent ID-VGS characteristics, ION/IOFF ratio, a point subthreshold slope (SS), and average SS for optimized device parameters. Electron charge stored in floating gate, isolation oxide layer and body doping concentration are optimized. The proposed JL-TFET can be a promising candidate for switching performances.

A Recessed-channel Tunnel Field-Effect Transistor (RTFET) with the Asymmetric Source and Drain

  • Kwon, Hui Tae;Kim, Sang Wan;Lee, Won Joo;Wee, Dae Hoon;Kim, Yoon
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.16 no.5
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    • pp.635-640
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    • 2016
  • Tunnel field-effect transistor (TFET) is a promising candidate for the next-generation electron device. However, technical issues remain for their practical application: poor current drivability, shor-tchannel effect and ambipolar behavior. We propose herein a novel recessed-channel TFET (RTFET) with the asymmetric source and drain. The specific design parameters are determined by technology computer-aided design (TCAD) simulation for high on-current and low S. The designed RTFET provides ${\sim}446{\times}$ higher on-current than a conventional planar TFET. And, its average value of the S is 63 mV/dec.

Analytical Modeling and Simulation of Dual Material Gate Tunnel Field Effect Transistors

  • Samuel, T.S.Arun;Balamurugan, N.B.;Sibitha, S.;Saranya, R.;Vanisri, D.
    • Journal of Electrical Engineering and Technology
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    • v.8 no.6
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    • pp.1481-1486
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    • 2013
  • In this paper, a new two dimensional (2D) analytical model of a Dual Material Gate tunnel field effect transistor (DMG TFET) is presented. The parabolic approximation technique is used to solve the 2-D Poisson equation with suitable boundary conditions. The simple and accurate analytical expressions for surface potential and electric field are derived. The electric field distribution can be used to calculate the tunneling generation rate and numerically extract tunneling current. The results show a significant improvement of on-current and reduction in short channel effects. Effectiveness of the proposed method has been confirmed by comparing the analytical results with the TCAD simulation results.

Dependency of Tunneling Field-Effect Transistor(TFET) Characteristics on Operation Regions

  • Lee, Min-Jin;Choi, Woo-Young
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.11 no.4
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    • pp.287-294
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    • 2011
  • In this paper, two competing mechanisms determining drain current of tunneling field-effect transistors (TFETs) have been investigated such as band-to-band tunneling and drift. Based on the results, the characteristics of TFETs have been discussed in the tunneling-dominant and drift-dominant region.

Characteristic Analysis of 4-Types of Junctionless Nanowire Field-Effect Transistor (4가지 무접합 나노선 터널 트랜지스터의 기판 변화에 따른 특성 분석)

  • Oh, Jong Hyuck;Lee, Ju Chan;Yu, Yun Seop
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2018.10a
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    • pp.381-382
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    • 2018
  • Subthreshold swings (SSs) and on-currents of four types of junctionless nanowire tunnel field-effect transistor(JLNW-TFET) are observed. Ge-Si structure for the source-channel junction has the highest drive current among Si-Si, Si-Ge, and Ge-Ge junction, and the drive current increases up to 1000 times compared to others. Minimum SS of Si-Si junction is reduced by up to 5 times more than others.

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Dual Gate L-Shaped Field-Effect-Transistor for Steep Subthreshold Slope

  • Najam, Faraz;Yu, Yun Seop
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2018.05a
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    • pp.171-172
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    • 2018
  • Dual gate L-shaped tunnel field-effect-transistor (DG-LTFET) is presented in this study. DG-LTFET achieves near vertical subthreshold slope (SS) and its ON current is also found to be higher then both conventional TFET and LTFET. This device could serve as a potential replacement for conventional complimentary metal-oxide-semiconductor (CMOS) technology.

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VT-Modulation of Planar Tunnel Field-Effect Transistors with Ground-Plane under Ultrathin Body and Bottom Oxide

  • Sun, Min-Chul;Kim, Hyun Woo;Kim, Hyungjin;Kim, Sang Wan;Kim, Garam;Lee, Jong-Ho;Shin, Hyungcheol;Park, Byung-Gook
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.14 no.2
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    • pp.139-145
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    • 2014
  • Control of threshold voltage ($V_T$) by ground-plane (GP) technique for planar tunnel field-effect transistor (TFET) is studied for the first time using TCAD simulation method. Although GP technique appears to be similarly useful for the TFET as for the metal-oxide-semiconductor field-effect transistor (MOSFET), some unique behaviors such as the small controllability under weak ground doping and dependence on the dopant polarity are also observed. For $V_T$-modulation larger than 100 mV, heavy ground doping over $1{\times}10^{20}cm^{-3}$ or back biasing scheme is preferred in case of TFETs. Polarity dependence is explained with a mechanism similar to the punch-through of MOSFETs. In spite of some minor differences, this result shows that both MOSFETs and TFETs can share common $V_T$-control scheme when these devices are co-integrated.