• Journal of the Korean Society of Safety
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• v.9 no.1
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• pp.56-60
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• 1994

In this study, Cuttent vs. Temperature characteristics of polyethylene with high-voltage treatment and crystallinity have been studied. The current curve( $I_{th}$) shows two peaks at 85 ($^{\circ}C$) and 50($^{\circ}C$), respectively. Trapping of carriers Proceeds during the high-field treatment, and it Is clear that 1th arises from the drift of carriers under the external voltage( $V_{b}$). From the results of TSC of BDPE and LDPE. It is realized that the traps are relation to the crystallinity.y.y.

• 한국정보디스플레이학회:학술대회논문집
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• 2005.07b
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• pp.1404-1407
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• 2005

We have fabricated organic light-emitting diodes using poly(N-vinylcarbazole)(PVK) doped with N,N'- diphenyl-N,N'-bis(3-methylphenyl)-[l,l'-biphenyl]- 4,4/-diamine (TPD) as the hole transport layer. TPD molecules act as the trapping sites in PVK and reduce the hole mobility, which can enhance the electronhole balance in the emitting layer, resulting in the enhanced device performance. We have found the optimum ratio of TPD to PVK for the EL efficiency.

• 한국정보디스플레이학회:학술대회논문집
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• 2005.07a
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• pp.101-104
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• 2005

Recently, competition between LC modes for LC TVs becomes high. In this paper, status of each mode is briefly reviewed with commenting on its electro-optic characteristics and possible application fields. Further, to understand effects of carbon nanotubes (CNTs) dispersed in nematic liquid crystal on electro-optic characteristic and orientation of the LC, CNT-doped NLC cells are made and evaluated. The hysterisis studies of voltage-dependent capacitance show that the amount of residual dc is greatly reduced due to ion trapping by CNTS.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 1999.05a
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• pp.411-414
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• 1999

70 ${\AA}$-thick oxides nitridied at various conditions were reoxidized at pemperatures of 900$^{\circ}C$ in dry-O$_2$ ambients for 5～40 mininutes. The gate oxide interface porperties as well as the oxide substrate interface properties of MOS(Metal Oxide Semiconductor) capacitors with various nitridation conditions, reoxidation conditions and pure oxidation condition were investigated. We stuided I$\sub$g/-V$\sub$g/ characteristics, $\Delta$V$\sub$g/ shift under constant current stress from electrical characteristics point of view and breakdown voltage from leakage current point of view of MOS capacitors with SiO$_2$, NO, RNO dielectrics. Overall, our experimental results show that reoxidized nitrided oxides show inproved charge trapping porperites, I$\sub$g/-V$\sub$g/ characteristics and gate $\Delta$V$\sub$g/ shift. It has also been shown that reoxidized nitridied oxide's leakage currented voltage is better than pure oxide's or nitrided oxide's from leakage current(1${\mu}$A) point of view.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2008.11a
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• pp.19-19
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• 2008

We investigated the programmable memory characteristics of nanoparticle-based memory devices based on the elementary metal nanoparticles (Co and Au) and their binary mixture synthesized by a micellar route to ordered arrays of metal nanoparticles as charge trapping layers. According to the metal nanoparticle species quite different programming/erasing efficiencies were observed, resulting in the tunable memory characteristics at the same programming/erasing bias conditions. This finding will be a good implication for further device scaling and novel device applications since most processes are based on the conventional semiconductor processes.

• Proceedings of the KSR Conference
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• 2009.05a
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• pp.1943-1950
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• 2009

The development of high voltage Insulated Gate Bipolar Transistor (IGBT) have given new device advantage in the areas where they compete with conventional GTO (Gate Turnoff Thyristor) technology. The IGBT combines the advantages of a power MOSFET (Metal-Oxide Semiconductor Field-Effect Transistor) and a bipolar power transistor. The change of electrical characteristics for IGBT is mainly coming from the change of characteristics of MOSFET at the input gate and the PNP transistors at the output. The gate oxide structure gives the main influence on the changes in the electrical characteristics affected by environments such as radiation and temperature, etc.. The change of threshold voltage, which is one of the important design parameters, is brought by charge trapping at the gate oxide. In this paper, the electrical characteristics are simulated by SPICE simulation, and the parameters are found to design optimized circuits.

• Korean Journal of Optics and Photonics
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• v.17 no.1
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• pp.1-6
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• 2006

We investigated the characteristics of the nonlinear magneto-optic effect (NMOE) depend on the transitions, the laser intensity and the temperature of the vapor cell, in the $D_1$ transition of $^{87}Rb$ atoms by using the Rb vapor cell contained with buffer gas of Ne 6.7 kPa. The size and the width of NMOE signal were increased according to the light intensity and temperature in the transition of F=2$\to$F'=2. However, In the case of using the F=2$\to$F'=1 transition, the size of the signal could be increased according to the light intensity without additional broadening of the width. We confirmed that the sensitivity of detecting small magnetic flux improved in this transition, and explained these effects by the different of the CPT configuration between Zeeman sublevels. At the optimal condition in experiment, the sensitivity of this system was evaluated less then $70pT/\sqrt{Hz}$.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2007.11a
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• pp.94-95
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• 2007

In this paper, the dependence of electrical characteristics of Silicon-$Al_2O_3$-Nitride-Oxide-Silicon (SANOS) memory cell transistors and program speed, reliability of memory device on interface trap between Si substrate and tunneling oxide was investigated. The devices were fabricated by the identical processing in a single lot except the deposition method of the charge trapping layer, nitride. In the case of P/E speed, it was shown that P/E speed is slower in the SONOS cell transistors with larger interface trap density by charge blocking effect, which is confirmed by simulation results. However, the data retention characteristics show much less dependence on interface trap. Therefore, to improve SANOS memory characteristic, it is very important to optimize the interface trap and charge trapping layer.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.45 no.7
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• pp.37-43
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• 2008

In this paper, the dependence of electrical characteristics of Silicon-$Al_2O_3$-Nitride-Oxide-Silicon (SANOS) memory cell transistors and program/erase (P/E) speed, reliability of memory device on interface trap between Si substrate and tunneling oxide and bulk trap in nitride layer were investigated using charge pumping method which has advantage of simple and versatile technique. We analyzed different SANOS memory devices that were fabricated by the identical processing in a single lot except the deposition method of the charge trapping layer, nitride. In the case of P/E speed, it was shown that P/E speed is slower in the SANOS cell transistors with larger capture cross section and interface trap density by charge blocking effect, which is confirmed by simulation results. However, the data retention characteristics show much less dependence on interface trap. The data retention was deteriorated as increasing P/E cycling number but not coincides with interface trap increasing tendency. This result once again confirmed that interface trap independence on data retention. And the result on different program method shows that HCI program method more degraded by locally trapping. So, we know as a result of experiment that analysis the SANOS Flash memory characteristic using charge pumping method reflect the device performance related to interface and bulk trap.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.23 no.7
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• pp.509-512
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• 2010

The thermal distribution of 2D and 3D p-n photovoltaic diode structures with and without surface texturing has been studied. By analysis of the numerical simulation results of the I-V characteristics and lattice temperature distributions the effect of different texturing structures on the characteristics of silicon p-n photovoltaic devices has been studied systematically. The efficiency of the device having surface texturing shows more than ~2% enhancement compared to the reference devices which did not have texturing. In addition, the effect of the density of the texturing groove has been studied and it has been confirmed that the texturing structure not only improves the light trapping but also plays an important role in the heat radiation.