• 전기학회논문지
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• 제57권3호
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• pp.416-420
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• 2008

This paper proposes a new method to improve signal characteristics at branches frequently met in system-level routing. We also introduce the numerical formula which can estimate the time delay due to branches and the simple design guideline for system-level routing. Finally, we propose the routing method which can eliminate the signal reflection for the case of one driver and two receivers (multi-drop topology).

• 한국정보통신학회논문지
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• 제15권11호
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• pp.2301-2306
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• 2011

현재 범용성이 높은 전자계 시뮬레이터가 널리 보급되어 왔으며, 안테나 설계, EMC 설계, 측정, 초고주파 소자 설계 등에 활용되고 있다. 본 연구에서는 X 밴드 영역에서 다양한 전자계 문제 해석을 목적으로 멀티 코어 기반 PC 자원을 보다 효율적으로 활용하고, 나아가 TCP/IP 기반 네트워크 토폴로지 구성을 통한 효율성 높은 전자계 시뮬레이터 구현을 위한 프레임워크 구축과 구현 방안을 제안하고 그 유효성을 검증하였다.

• 한국전산구조공학회:학술대회논문집
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• 한국전산구조공학회 2002년도 가을 학술발표회 논문집
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• pp.295-302
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• 2002

This paper introduces a method to determine strut-tie models in reinforced concrete (RC) structures using the evolutionary structural optimization (ESO). Even though strut-tie models are broadly adapted in design of reinforced concrete members subjected to shear and torsion, conventional methods can hardly give correct models in RC members subjected to complex loadings and geometry conditions. In this paper, the basic idea of the ESO method is used to determine more rational strut-tie models. Since an optimum topology of structures, finally obtained by the ESO method, usually represents a truss-like structure, the ESO method can effectively be used in finding the best strut-tie model in RC structures. Several example structures are provided to demonstrate the capability of the proposed method in finding the best strut-tie model of each RC structure and to verify its efficiency in application to real design problems.

• 전력전자학회:학술대회논문집
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• 전력전자학회 2011년도 전력전자학술대회
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• pp.25-26
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• 2011

In some cases of grid connected system using photovoltaic modules, high voltage step up ratio is required. In this paper, non-isolated 2-stage cascaded boost converter with coupled inductor is proposed. Due to reduce the input current ripple and size of the inductor by using coupled inductor method, this topology is suitable for MIC(Module Integrated Converter). The operational characteristic of the proposed topology is verified through the theorical analysis, simulation and experimental waveform.

• 한국소음진동공학회:학술대회논문집
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• 한국소음진동공학회 2002년도 추계학술대회논문집
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• pp.576-581
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• 2002

The suspension is a structure that supports reading, writing head in information storage device. In order to develop the information storage device of high track density, it is necessary to study about the suspension. To satisfy operation condition of information storage device, the suspension shape is very important since it correlates to dynamic characteristics. Therefore, it is necessary to analyze the dynamic characteristics by using finite element analysis and to optimize the suspension of information storage device using size optimization and topology optimization. The suspension has various modes according to different kinds of frequency bandwidth. Sway mode and second torsion mode are especially critical among them. In this paper, we investigated method to improve bandwidth of sway and second torsion mode of HDD and ODD suspension by using size optimization and topology optimization.

• 대한전기학회논문지:시스템및제어부문D
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• 제54권6호
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• pp.403-408
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• 2005

As the increasing integrity of VLSI, the BIST(Built-In Self Test) is used as an effective method to test chips. Generally the pseudo-random test pattern generation is used for BIST. But it requires too many test patterns when there exist random This paper proposes and presents a new efficient network architecture for Reflective Memory System (RMS). A time to copy shared-data among nodes effects critically on the entire performance of the RMS. In this paper, the recent researches about the RMS are investigated and compared. The device named Topology Conversion Switch(TCS) is introduced to realize the proposed network architecture. One of the RMS based industrial control networks, Ethernet based Real-time Control Network (ERCnet), is adopted to evaluate the performance of the proposed network architecture for RMS.

• Journal of Power Electronics
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• 제13권6호
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• pp.928-938
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• 2013

This paper proposes a novel control method for a multi-output switched-resonant converter. Output voltage can be regulated against variations in the supply voltage and load by controlling the voltage of the resonant capacitor (pulse amplitude control). Precise control is possible when pulse amplitude control is combined with pulse number control. The converter is analyzed, and design considerations are explained by using examples. Control implementation is described and load regulation and ripples are analyzed by simulation and hardware results. The topology is modified to obtain an additional negative output without any additional hardware other than a diode. The analysis of such a triple output converter with two positive outputs and one negative output is conducted and confirmed. The topology and control scheme are scalable to any number of outputs.

• Structural Engineering and Mechanics
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• 제73권4호
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• pp.463-479
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• 2020

This paper is aimed to address a simultaneous optimization of the size, shape, and topology of steel lattice towers through a combination of the radial basis function (RBF) neural networks and the artificial bee colony (ABC) metaheuristic algorithm to reduce the computational time because mere metaheuristic optimization algorithms require much time for calculations. To verify the results, use has been made of the CIGRE Tower and a 132 kV transmission towers as numerical examples both based on the design requirements of the ASCE10-97, and the size, shape, and topology have been optimized (in both cases) once by the RBF neural network and once by the MSTOWER analyzer. A comparison of the results shows that the neural network-based method has been able to yield acceptable results through much less computational time.

• Journal of Power Electronics
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• 제19권6호
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• pp.1486-1495
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• 2019

Dealing with the DC link fault poses a technical problem for an HVDC based on a modular multilevel converter. The fault suppressing mechanisms of several sub-module topologies with DC fault current blocking capacity are examined in this paper. An improved half-bridge sub-module topology with double direction control switch is also designed to address the additional power consumption problem, and a sub-module topology called hybrid double direction blocking sub module (HDDBSM) is proposed. The DC fault suppression characteristics and sub-module capacitor voltage balance problem is also analyzed, and a self-startup method is designed according to the number of capacitors. The simulation model in PSCAD/EMTDC is built to verify the self-startup process and the DC link fault suppression features.

• 한국지능시스템학회논문지
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• 제6권2호
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• pp.13-21
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• 1996

하이오더 신경망에 대한 필요성과 유용성에 대해서는 신경망 연구의 초기부터 잘 알려져 있다. 그러나 오더가 늘어남에 따라 항의 수가 급격히 증가하는 문제로 인하여 이러한 망을 설계하고 학습하는데 많은 어려움이 있었다. 본 논문에서는 문제에 적합한 하이오더 신경망 모델을 효율적으로 구성하기 위한 진화적 학습 방법을 제시한다. 이 방법에서는 시그마유닛과 파이유닛을 융합한 신경트리 표현을 사용한다. 또한 MDL기반의 적합도 분류 및 예측 문제에 있어서 제시된 방법의 유용성을 검증한다.