• The Journal of the Institute of Internet, Broadcasting and Communication
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• v.21 no.6
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• pp.49-55
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• 2021

Recently, a small tracking radar requires the development of a small millimeter wave tracking radar having a high range resolution that can acquire and track a target in various environments and disable the target system with a single blow. Small millimeter wave tracking radar with high range resolution needs to implement a signal processor that can process wide bandwidth signals in real time and meet the requirements of small tracking radar. In this paper, we designed a signal processor that can perform the role and function of a signal processor for a small millimeter wave tracking radar. The signal processor for the small millimeter wave tracking radar requires the real-time processing of input signal of OOOMHz center frequency and OOOMHz bandwidth from 8 channels. In order to satisfy the requirements of the signal processor, the signal processor was designed by applying the high-performance FPGA (Field Programmable Gate Array) and ADC (Analog-to-digital converter) for pre-processing operations, such as DDC (Digital Down Converter) and FFT (Fast Fourier Transform). Finally, the signal processor of the small millimeter wave tracking radar was verified via performance test.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2012.10a
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• pp.225-228
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• 2012

In this paper, a 10-bit digital-to-analog converter (DAC) with small area is proposed. The 10-bit DAC consists of a 8-bit decoder, a 2-bit time-interpolator, and a buffer amplifier. The proposed time-interpolation is achieved by controlling the charging time through a low-pass filter composed of a resistor and a capacitor. To implement the accurate time-interpolator, a control pulse generator using a replica circuit is proposed to minimize the effect of the process variation. The proposed 10-bit Time-Interpolation DAC occupies 61 % of the conventional 10-bit resistor-string DAC. The proposed DAC is designed using a $0.35{\mu}m$ CMOS process with a 3.3 V supply. The simulated DNL and INL are +0.15/-0.21 LSB and +0.15/-0.16 LSB, respectively.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.33 no.2B
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• pp.59-68
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• 2008

In order to activate the digital broadcasting in Korea, the analog broadcasting will have been closed down until 2012. Recently IPTV(Internet Protocol TV) thorough internet has been regarded as the fourth media following the terrestrial, satellite, and cable for the digital broad casting. And it has been the important medium for the communication and broadcasting system. However IP is not easy to replace the entire broadcasting system with the digital - type broadcasting system. For the digital broadcasting, we should replace all TV sets, install the settop-boxes to receive the various IP media, solve problems about time delaying when changing channels, and support communication and broadcasting consolidation service for such as PVR and Network CCTV. IPMG is the digital converter that is able to solve these problems. In this paper, I'll develop and analyze IPMG converter's performance which sends and receives both the analogue and digital broadcasting signals through various media gives the Network PVR service.

• Journal of the Korea Society of Computer and Information
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• v.15 no.4
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• pp.91-98
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• 2010

Advances in communications and control technology, the strengthening of the Internet, and the growing recognition of the urgency to reduce the risk and production cost are motivating the development of improvements in the traditional manufacturing industry. In this paper, we developed a remote dust collector bag control system which is a combination of advanced IT and traditional dust collector based on the event. At first, we made the A/D(Analog/Digital) converter using a micro processor because the differential pressure transmission, which is a sensor of the dust collector, produces analog volt data. A/D converter can provide RS-232 communication to connect with Power Line Communication(PLC) modem. And, n-bytes message format was defined for the efficient dust collector bag information transmission from a dust collector to a user. Also, we designed the data types to model the dust collector and the dust collector bag, and they were logically modeled using XML and object-oriented modeling method. In addition to that, we implemented the system for showing the dust collector bag exchange time exactly to users at real-time using various visual user interfaces.

• Journal of the Korean Institute of Telematics and Electronics
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• v.18 no.5
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• pp.1-9
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• 1981

Experimental results on a 4-bit charge-coupled A/D converter are described. Major operations in the successive approximation algorithm are implemented in a monolithic chip, CCADC, which was fabricated usir p-channel CCD technology, with its die size of 4,200 mil2 Typical operating frequency range has been found out to be from 500Hz to 200kHz. In that frequency range, no missing code has been found in the whole signal range of 2.4 volts for ramp signal slewing at 1 LSB/(sampling time). A discussion is made on several layout techniques to conserve the nominal binary ratio of (8:4:2:1) among the areas of four adjacent potential wells (M wells), whose charge storing capacities correspond to each bit magnitude - 3.6 pC, 1.8 pC, 0.9 pC, and 0.45 pC nominal in the order of MSB to the LSB. The effect of 'dump slot', which is responsible for the excessive nonlinearity (2$\frac{1}{2}$LSB) in the A/D converter, is explained. A novel input scheme called 'slot zero insertion' to circumvent the deleterious effects of the dump slot is described with the experimental results.

• Journal of Electrical Engineering and Technology
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• v.13 no.1
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• pp.192-200
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• 2018

In this study, improvements for error correction, speed, position, and rotation calculation algorithms have been proposed to be used in resolver to digital conversion (RDC) systems. The proposed open-loop system drives the resolver and uses the output signals of the resolver signal to estimate the real time position, the instant speed, and the rotation count with high resolution and accuracy even at high speeds and noise. The proposed solution implements strong features of both closed and open loop based systems while eliminating their weak points. The improvements proposed is resistant to noise owing to digital FIR filter and data averaging techniques. The implementation used for proof of concept is implemented on a hardware using an FPGA and configurable to be used by any resolver.

• Journal of Korean Academy of Oral and Maxillofacial Radiology
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• v.25 no.2
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• pp.363-373
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• 1995

The aim of this study was to evaluate and compare observer performance between conventional radiographs and their digitized images for the detection of bone loss in the bifurcation of mandiblar first molar. One dried human mandible with minimal periodontal bone loss around the first molar was selected and serially enlarged 17 step defects were prepared in the bifurcation area. The mandible was radiographed with exposure time of 0.12, 0.20, 0.25, 0.32, 0.40, 0.64 seconds, after each successive step in the preperation and all radiographs were digitized with IBM-PC/32 bit-Dx compatible, video camera (VM-S8200, Hitachi Co., Japan), and color monitor(Multisync 3D, NEC, Japan). Sylvia Image Capture Board for the ADC(analog to digital converter) was used. The obtained results were as follows: 1. In the conventional radiographs, the mean score of the readability was higher at the condition of exposure time with 0.32 second. Also, as the size of artificial lesion was increased, the readability of radiographs was elevated (P<0.05). 2. In the digital images, the mean score of the readability was higher at the condition of exposure time with 0.40 second. Also, as the size of artificial lesion was increased, the readability of digital images was elevated(P<0.05). 3. At the same exposure time, the mean scores of readibility were mostly higher in the digitized images. As the exposure time was increased, the digital images were superior to radiographs in readability. 4. As the size of lesion was changed, the digital images were superior to radiographs in detecting small lesion. 5. The coefficient of variation of mean score has no significant difference between digital images and radiographs.

• Proceedings of the KIEE Conference
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• 1997.07f
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• pp.2028-2032
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• 1997

When a high performance current control is desired, a computation time delay of a digital control system may deteriorate the control performance of a current controller. Such a non-negligible effect can be considerable in transient state. This paper deals with the modified predictive current control that compensates the time delay effects of a conventional predictive current control. The method is closely related to a local average current control and a symmetrical PWM pattern generation. Also some theoretical approaches are presented to describe the voltage saturation boundary of the power converter. For validation, the proposed method is applied to an active power filter system. The experimental results show considerable improvement in current tracking capability.

• Journal of the Institute of Electronics Engineers of Korea SC
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• v.44 no.6
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• pp.29-34
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• 2007

It is important to analyse the frequency spectrum for the measurement of modulated signal, distortion, and noise. The frequency spectrum analysis is performed by the execution of Radix-2 DIT DFT i.e. FFT algorithm. The discrete input signal converted by A/D converter from the input signal in time domain is mathematically transformed to the frequency spectrum by FFT algorithm. In this study, we design the digital spectrum analyser by the hardware based on the TMS320F2812 DSP and AD9244 converter, and by the software based on the C28x S/W modules. We can timely analyse the frequency spectrum in mobile communication system by the digital frequency analyser based on the high performance DSP and S/W modules. This real-time analysing capability is the important performance in the internet-based mobile communication server system.

• The Transactions of the Korean Institute of Electrical Engineers
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• v.38 no.9
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• pp.701-709
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• 1989

The time-averaged behavior of the three-phase Inductor-Converter Bridge (ICB) circuit has been analyzed by using the state-space averaging method. Especially, a second order approximation in the matrix expansion makes the analysis possible. The results are in a closed form which is quite different from the conventional solution obtained by using the Fourier Series. Therefore, the computational difficulties in evaluating the infinite Fourier series can be avoided and the results derived in this paper are available expecially in real time control. By comparing with the Fourier result, it has been verified that the analysis by means of the state-space averaging method is more accurate and simple. The digital simulation and the equivalent experiments have also been carried out to confirm the theoretical results.