• Korean Journal of Materials Research
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• v.9 no.11
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• pp.1129-1136
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• 1999

TIN films were prepared on Si(100) substrate by ICP-CVD(inductive1y coupled plasma enhanced chemical vapor deposition) using TEMAT(tetrakis ethylmethamido titanium : Ti$[\textrm{N}\textrm{(CH)}_{3}\textrm{C}_{2}\textrm{H}_{5}]_{4}$) precursor at various deposition conditions. Phase, microstructure, and the electrical properties of TIN films were characterized by x-ray diffraction (XRD), x-ray photoelectron spectroscopy (XPS), high resolution transmission electron microscopy (HRTEM) and electrical measurements. Polycrystalline TiN films with B1 structure were grown at temperatures over $200^{\circ}C$. Preferentially oriented along TiN(111) films were obtained at temperatures over $300^{\circ}C$ with the flow rates of 10, 5, and 5 sccm for TEMAT, $\textrm{N}_{2}$ and Ar gas. The TiN/Si(100) interface was flat and no chemical reaction between TIN and $\textrm{SiO}_2$ was found. The resistivity, carrier concentration and the carrier mobility for the TiN sample prepared at $500^{\circ}C$ are 21 $\mu\Omega$cm, 9.5$\times\textrm{10}^{18}\textrm{cm}^{-3}$ and $462.6\textrm{cm}^{2}$/Vs, respectively.

• Proceedings of the Korean Vacuum Society Conference
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• 1999.07a
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• pp.163-163
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• 1999

MOSFET, MESFET 그리고 MODFET는 Logic ULSIs, high speed ICs, RF MMICs 등에서 중요한 역할을 하고 있으며, 그것의 gate electrode, contact, interconnect 등의 물질로는 refractory metal을 이용한 CoSi2, MoSi2, TaSi2, PtSi2, TiSi2 등의 효과를 얻어내고 있다. 그중 TiSi2는 비저항이 가장 낮고, 열적 안정도가 좋으며 SAG process가 가능하므로 simpler alignment process, higher transconductance, lower source resistance 등의 장점을 동시에 만족시키고 있다. 최근 소자차원이 scale down 됨에 따라 TiSi2의 silicidation 과정에서 C49 TiSi2 phase(high resistivity, thermally unstable phase, larger grain size, base centered orthorhombic structure)의 출현과 그것을 제거하기 위한 노력이 큰 issue로 떠오르고 있다. 여러 연구 결과에 따르면 PAI(Pre-amorphization zimplantation), HTS(High Temperature Sputtering) process, Mo(Molybedenum) implasntation 등이 C49를 bypass시키고 C54 TiSi2 phase(lowest resistivity, thermally stable phase, smaller grain size, face centered orthorhombic structure)로의 transformation temperature를 줄일 수 있는 가장 효과적인 방법으로 제안되고 있지만, 아직 그 문제가 완전히 해결되지 않은 상태이며 C54 nucleation에 대한 physical mechanism을 밝히진 못하고 있다. 본 연구에서는 증착 시 기판온도의 변화(400~75$0^{\circ}C$)에 따라 silicon 위에 DC/RF magnetron sputtering 방식으로 Ti/Si film을 각각 제작하였다. 제작된 시료는 N2 분위기에서 30~120초 동안 500~85$0^{\circ}C$의 온도변화에 따라 RTA법으로 각각 one step annealing 하였다. 또한 Al을 cosputtering함으로써 Al impurity의 존재에 따른 영향을 동시에 고려해 보았다. 제작된 시료의 분석을 위해 phase transformation을 XRD로, microstructure를 TEM으로, surface topography는 SEM으로, surface microroughness는 AFM으로 측정하였으며 sheet resistance는 4-point probe로 측정하였다. 분석된 결과를 보면, 고온에서 제작된 박막에서의 C54 phase transformation temperature가 감소하는 것이 관측되었으며, Al impuritydmlwhswork 낮은온도에서의 C54 TiSi2 형성을 돕는다는 것을 알 수 있었다. 본 연구에서는 결론적으로, 고온에서 증착된 박막으로부터 열적으로 안정된 phase의 낮은 resistivity를 갖는 C54 TiSi2 형성을 보다 낮은 온도에서 one-step RTA를 통해 얻을 수 있다는 결과와 Al impurity가 존재함으로써 얻어지는 thermal budget의 효과, 그리고 그로부터 기대할 수 있는 여러 장점들을 보고하고자 한다.

• Proceedings of the Korean Institute of IIIuminating and Electrical Installation Engineers Conference
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• 2002.11a
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• pp.329-334
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• 2002

This study evaporates TiO$_2$ layer thickness differently with RF sputtering method on Si Wafer(n-100). Thin film is made with the structure of Si+TiO$_2$ and Si+TiO$_2$+Al by evaporating TiN which is used as Antireflection of superintegrated semiconductor integrated circuit with Photo Catalyst. The research is performed to increase the characteristics of photon energy according to TiO$_2$ thickness and the reliability and reproducibility of TiO$_2$ thin film. Reversal of electric Permittivity values is induced by dipole polarization shown in the dielectric of thin film. Complex electric constant ($\varepsilon$$_1$, $\varepsilon$$_2$) has larger peak values as it's thickness is thinner and then it is larger according to the increase of frequency. Electric Permittivity by photon energy has large value in imaginary number and is reduced exponentially by the increase of carrier density according to that of photon energy.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.16 no.5
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• pp.390-396
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• 2003

As the design rule of device continued to shrink, the contact resistance in small contact size became important. Although the conventional TiN/Ti structure as a ohmic layer has been widely used, we propose a new TiN/Co film structure. We characterized a contact resistance by using a chain pattern and a KELVIN pattern, and a leakage current determined by current-voltage measurements. Moreover, the microstructure of TiN/ Ti/ silicide/n$\^$+/ contact was investigated by a cross-sectional transmission electron microscope (TEM). The contact resistance by the Co ohmic layer showed the decrease of 26 % compared to that of a Ti ohmic layer in the chain resistance, and 50 ％ in KELYIN resistance, respectively. A Co ohmic layer shows enough ohmic behaviors comparable to the Ti ohmic layer, while higher leakage currents in wide area pattern than Ti ohmic layer. We confirmed that an uniform silicide thickness and a good interface roughness were able to be achieved in a CoSi$_2$ Process formed on a n$\^$+/ silicon junction from TEM images.

• Journal of the Korean Vacuum Society
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• v.12 no.S1
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• pp.63-66
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• 2003

It is experimentally shown that a $TiO_2$ film on Si(111) substrate was prepared by using the technique of D.C. reaction sputter deposition with $Ar^{+}$ ion beam bombardment, and a layer-like structure was observed from the depth profile of the interface between $TiO_2$ film and Si substrate with Scanning Electron Microscopy and Electron Probe. It was also surprisingly discovered that Ti atoms could be detected at about 9 $\mu$m depth. The $TiO_2$-Si interface bombarded by $Ar^{+}$ ion beams revealed multi-layer structures, a mechanism might be caused by defect diffusion, impurity and matrix relocation. Multi-relocations of impurity and matrix atoms were as a result of profile broadening of the $TiO_2$-Si interface, and the spread due to matrix relocation in this system is shown to exceed much more the spread due to impurity relocation.

• Analytical Science and Technology
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• v.6 no.2
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• pp.239-246
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• 1993

The structure of $(BaSr)TiO_3$ thin film deposited on ITO coated glass, bare glass and (100) Si substrates was not changed, but the crystallinity was improved by the polycrystalline ITO layer and (100) Si substrate. The composition of $(BaSr)TiO_3$ thin film deposited on ITO coated glass was nearly stoichiometric ((Ba+Sr)/Ti=1.08~1.09) and very uniform through all deposition process. But as the deposition temperature increases, the interdiffusion between grown thin film and ITO layer and between ITO layer and base glass is severer. $(BaSr)TiO_3$ thin film deposited on ITO coated glass substrate was highly transparent. The refractive index($n_f$) of $(BaSr)TiO_3$ thin film deposited on ITO coated glass was 2.138~2.286 as a function of substrate temperature.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2008.06a
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• pp.168-168
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• 2008

Dimension of a transistor has rapidly shrunk to increase the speed of device and to reduce the power consumption. However, it is accompanied with several problems like direct tunneling through the gate dioxide layer and low conductivity characteristic of poly-Si gate in nano-region. To cover these faults, study of new materials is urgently needed. Recently, high dielectric materials like $Al_2O_3$, $ZrO_2$, and $HfO_2$ are being studied for equivalent oxide thickness (EOT). However, poly-Si gate is not compatible with high-k materials for gate-insulator. Poly Si gate with high-k material has some problems such as gate depletion and dopant penetration problems. Therefore, new gate structure or materials that are compatible with high-k materials are also needed. TiN for metal/high-k gate stack is conductive enough to allow a good electrical connection and compatible with high-k materials. According to this trend, the study on dry etching of TiN for metal/high-k gate stack is needed. In this study, the investigations of the TiN etching characteristics were carried out using the inductively coupled $BCl_3$-based plasma system and adding $Cl_2$ gas. Dry etching of the TiN was studied by varying the etching parameters including $BCl_3$/Ar gas mixing ratio, RF power, DC-bias voltage to substrate, and $Cl_2$ gas addition. The plasmas were characterized by optical emission spectroscopy analysis. Scanning electron microscopy was used to investigate the etching profile.

• Transactions on Electrical and Electronic Materials
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• v.5 no.5
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• pp.169-172
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• 2004

Deep sub-micron device required to get the superior ultra thin gate oxide characteristics. In this research, I will recommend a novel shallow trench isolation structure(STI) for thin gate oxide and a $N_2$O gate oxide 30 $\AA$ by NO ambient process. The local oxidation of silicon(LOCOS) isolation has been replaced by the shallow trench isolation which has less encroachment into the active device area. Also for $N_2$O gate oxide 30 $\AA$, ultra thin gate oxide 30 $\AA$ was formed by using the $N_2$O gate oxide formation method on STI structure and LOCOS structure. For the metal electrode and junction, TiSi$_2$ process was performed by RTP annealing at 850 $^{\circ}C$ for 29 sec. In the viewpoints of the physical characteristics of MOS capacitor, STI structure was confirmed by SEM. STI structure was expected to minimize the oxide loss at the channel edge. Also, STI structure is considered to decrease the threshold voltage, result in a lower Ti/TiN resistance( Ω /cont.) and higher capacitance-gate voltage(C- V) that made the STI structure more effective. In terms of the TDDB(sec) characteristics, the STI structure showed the stable value of 25 % ～ 90 % more than 55 sec. In brief, analysis of the ultra thin gate oxide 30 $\AA$ proved that STI isolation structure and salicidation process presented in this study. I could achieve improved electrical characteristics and reliability for deep submicron devices with 30 $\AA$ $N_2$O gate oxide.

• Journal of the Korean Crystal Growth and Crystal Technology
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• v.16 no.3
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• pp.101-105
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• 2006

We fabricated the nano $TiN_x$ by making of reaction between titanium powder and $Si_3N_4$ during planetary milling. The $TiN_x$ powder was sintered by spark plasma sintering machine after mixing with 50 wt% of titanium powder, and the sintered body was heat-treated at $850^{\circ}C$ in order to investigate its hardness property at the elevated temperature. We analyzed crystal structure by XRD. We observed the peaks of $TiN_{0.26}$ and TiN after 10 hours milling, and we observed TiN peak mainly after 20 hours milling. The reacted particle size distribution was investigated by FE-SEM. Increase of milling time, the size of reacted particles was decreased and the $10{\sim}20nm$ size of $TiN_x$ on the surface of titanium and $TiN_x$ was observed after 20 hours milling. The micro-Vickers hardness of mixed sintered body was about $1050kgf/mm^2$.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2004.11a
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• pp.45-48
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• 2004

본 논문은 니켈실리사이드 (Ni-Silicide)의 열안정성을 개선하기 위해서 Ti와 TiN capping 층을 이용한 새로운 구조 Ni/Ti/Ni/Tin 구조를 제안하였다. 계면특성과 열안정성을 향상시키기 위해 타이타늄(Ti)을 니켈(Nickel) 사이에 적용하고, 니켈 실리사이드 형성 시 산소와의 반응을 억제하여 실리사이드의 응집현상을 개선시키고자 TiN capping을 적용 하였다. 니켈 실리사이드의 형성온도에 따른 $NiSi_2$로의 상변이를 억제할 수 있었고, 열안정성 평가를 위한 $700^{\circ}C$, 30분간 고온 열처리에서도 제안한 구조로 니켈실리사이드의 단면특성과 19 % 정도 면저항 특성을 개선하였다.