• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.16 no.5
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• pp.390-396
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• 2003

As the design rule of device continued to shrink, the contact resistance in small contact size became important. Although the conventional TiN/Ti structure as a ohmic layer has been widely used, we propose a new TiN/Co film structure. We characterized a contact resistance by using a chain pattern and a KELVIN pattern, and a leakage current determined by current-voltage measurements. Moreover, the microstructure of TiN/ Ti/ silicide/n$\^$+/ contact was investigated by a cross-sectional transmission electron microscope (TEM). The contact resistance by the Co ohmic layer showed the decrease of 26 % compared to that of a Ti ohmic layer in the chain resistance, and 50 ％ in KELYIN resistance, respectively. A Co ohmic layer shows enough ohmic behaviors comparable to the Ti ohmic layer, while higher leakage currents in wide area pattern than Ti ohmic layer. We confirmed that an uniform silicide thickness and a good interface roughness were able to be achieved in a CoSi$_2$ Process formed on a n$\^$+/ silicon junction from TEM images.

• Journal of the Korean institute of surface engineering
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• v.30 no.6
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• pp.374-381
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• 1997

We have studied the effect of the interface between tungsten silicide and polysilicon the silicide reaction. The results showed that the cleaning of the silicon surface prior to the deposition of tungsten silicide affected the interface properties, thereby leading to the difference in the resistivity and surface morhpology of tungsten silicide. Compared with HF cleaning, the use of SCl cleaning yielded higher resistivity of tungsten silicide at the low anneal temperature (up to $900^{\circ}C$). However, furtherature to $1000^{\circ}C$ reduced the resistivity significantly, similar to that obtained with HF cleaning. It was also observed that the annealing of WSix/HF-cleaned poly-si allowed the formation of bucking weve (partially decohesion area) on the surface. In contrast, the use of SCl celaning did not produce the buckling waves on the surface. Also the presence of 200$\AA$ -thick TiW between tungsten silicide and HF-cleaned poly-Si effectively prevented the formation of the waves. However, high-temperature annealing of WSix/200A-TiW/Poly-Si allowed the excess silicon in tungsten silicide to precipitate inside the silcide, causing the slight increase of the resistivity after annealing at $1050^{\circ}C$.

• ETRI Journal
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• v.13 no.4
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• pp.58-69
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• 1991

고집적회로에서 A1 금속공정의 diffusion barrier로 널리 사용되는 titanium nitride의 성질을 조사하였다. 실제 회로 구조의 열적 안정성을 관찰하기 위하여 준비된 TiN/Ti다층 barrier를 $600^{\circ}C$까지 열처리하여 x-ray photoelectron spectroscopy (XPS), cross-sectional transmission electron microscopy(XTEM) 등으로 분석하였다. 열처리 온도가 증가됨에 따라 oxygen은 TiN 층의 표면과 pure-Ti 층에 pile up 된다. TiN 층의 표면에서는 $600^{\circ}C$열처리시 TiN이 분해되어 완전히 $TiO_2$가 형성되며, TiN 층 내에서는 oxygen 함량은 열처리 온도의 증가에 따라 커지고 이때 형성되는 Ti-oxide는 $TiO_2$ 보다 TiO, $Ti_2$$O_3$ 상태로 존재하게 된다. Pure-Ti 층은 열처리시 두개의 층으로 나누어 지는 데, 표면에서 침투하는 oxygen과 pure-Ti이 반응하여 Ti-oxide 층이 생기며 실리콘 기판과의 반응으로 Ti-silicide를 형성한다. $600^{\circ}C$에서 모든 Ti 층이 반응으로 소모되고 열적 stress, Ti-silicide의 grain growth, oxygen의 침입으로 TiN 층에 blistering이 발생한다.

• Journal of Korea Foundry Society
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• v.17 no.1
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• pp.85-92
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• 1997

There has been a considerable interest to develop the silicide alloys as high temperature structural materials because of their excellent high temperature stability and strength, however, their lack of room temperature ductility and toughness was a main obstacle for the application. In order to improve ductility while maintaining good high temperature properties, possible refractory metal-silicide eutectic alloys composed of fine two phases were prepared by VAR(Vacuum Arc Remelting). Three silicide alloys, $Nb-Nb_3Si$, $Ti-Ti_5Si_3$, $V-V_3Si$, were selected as prospecting silicide eutectics and those high temperature characteristics were evaluated by high temperature compression test.

• Journal of the Korean Vacuum Society
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• v.1 no.1
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• pp.168-175
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• 1992

The surface and interface morphology as well as the sheet resistance, and uniformity of TiSiz film are significantly improved and the lateral titanium silicide growth over the oxide spacer is minimized by the use of ion beam mixing and rapid thermal annealing in nitrogen ambient. In addition, TiSiz film formations on TiISi and TiISiOz system were also studied.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2004.11a
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• pp.45-48
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• 2004

본 논문은 니켈실리사이드 (Ni-Silicide)의 열안정성을 개선하기 위해서 Ti와 TiN capping 층을 이용한 새로운 구조 Ni/Ti/Ni/Tin 구조를 제안하였다. 계면특성과 열안정성을 향상시키기 위해 타이타늄(Ti)을 니켈(Nickel) 사이에 적용하고, 니켈 실리사이드 형성 시 산소와의 반응을 억제하여 실리사이드의 응집현상을 개선시키고자 TiN capping을 적용 하였다. 니켈 실리사이드의 형성온도에 따른 $NiSi_2$로의 상변이를 억제할 수 있었고, 열안정성 평가를 위한 $700^{\circ}C$, 30분간 고온 열처리에서도 제안한 구조로 니켈실리사이드의 단면특성과 19 % 정도 면저항 특성을 개선하였다.

• Journal of the Korean Institute of Telematics and Electronics
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• v.26 no.6
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• pp.57-62
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• 1989

Sputter-deposited Ti film on Si substrates which were implanted with various doses of As was annealed at the temperature of 600-900$^{circ}C$ for 20 sec in Ar atmosphere. The sheet resistance of Ti-silicides was measured by 4-point probe, the thickness by $alpha$-step, and observed the behavior of As dopant in Si substrates by ASR. With increasing As doses, the thickness of Ti-silicides decreased and the sheet resistance of Ti-silicides increased. And we discussed the relationships between the above results and the factors of Si diffusion.

• Korean Journal of Materials Research
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• v.2 no.6
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• pp.408-416
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• 1992

Stable TiS$i_2$was formed by RTA on single-Si and on poly-Si. Subsequently, an Al-1% Si layer with 600-nm thick was deposited on top of the TiS$i_2$, Finally, the specimens were annealed for 30min at 400-60$0^{\circ}C$in $N_2$ambient. The thermal stability of Al-1% Si/TiS$i_2$bilayer and interfacial reaction were investigated by measuring sheet resistance, Auger electron spectroscopy (AES), and scanning electron microscopy (SEM). The composition and phase of precipitates formed by the reaction of Al-1% Si with Ti-silicide were studied by energy dispersive spectroscopy (EDS), X-ray diffraction (XRD). In the case of single-Si substrate the reaction of Al-1% Si layer with TiS$i_2$layer resulted in precipitates, consuming all TiS$i_2$layer at 55$0^{\circ}C$. On the other hand, the disappearance of TiS$i_2$on poly-Si occurred at 50$0^{\circ}C$ and more precipitates were formed by the reaction of Al-1% Si/TiS$i_2$on potty-Si substrate than those of the reaction on single-Si substrate. This phenomenon resulted from the fact that Ti-silicide formed on poly-Si was more unstable than on single-Si by the effect of grain boundary. By EDS analysis the precipitates were found tobe composed of Ti, Al, and Si. X-ray diffraction showed the phase of precipitates to be theT$i_7$A$l_5$S$i_12$ternary compound.

• Journal of Powder Materials
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• v.12 no.6 s.53
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• pp.447-452
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• 2005

The synthesis and consolidation of titanium silicide by electro-discharge-sintering has been investigated. As-received Ti powder was in flaky shape and the mean particle size was $45.0{\mu}m$, whereas the mean particle size of the pre-milled Si powder with angular shape was $8.0{\mu}m$. Single pulse of 2.5 to 5.0 kJ/0.34g-elemental Ti and pre-milled Si powder mixture with the composition of $Ti-37.5at.\%$ Si was applied using $300{\mu}F$ capacitor. The solid with $Ti_5Si_3$ phase has been successfully fabricated by the discharge with the input energy more than 2.5kJ in less than $129{\mu}sec.$ Hv values were found to be higher than $1000kgf/mm^2$. The formation of $Ti_5Si_3$ occurred through a fast solid state diffusion reaction.

• Journal of the Korean Ceramic Society
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• v.38 no.9
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• pp.782-786
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• 2001

Cobalt silicide has been employed to Embedded DRAM (Dynamic Random Access Memory) and Logic (EDL) as contact material to improve its speed. We have investigated the influences of Ti and TiN capping layers on cobalt-silicided Complementary Metal-Oxide-Semiconductor (CMOS) device characteristics. TiN capping layer is shown to be superior to Ti capping layer with respect to high thermal stability and the current driving capability of pMOSFETs. Secondary Ion Mass Spectrometry (SIMS) showed that the Ti capping layer could not prevent the out-diffusion of boron dopants. The resulting operating current of MOS devices with Ti capping layer was degraded by more than 10%, compared with those with TiN.