• JSTS:Journal of Semiconductor Technology and Science
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• v.3 no.2
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• pp.83-88
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• 2003

The reset operation of a CCD image sensor was improved using charge trapping of a MOS structure to realize a loe voltage driving. A DC bias generating circuit was added to the reset structure which sets reference voltage and holds the signal charge to be detected. The generated DC bias is added to the reset pulse to give an optimized voltage margin to the reset operation, and is controlled by adjustment of the threshold voltage of a MOS transistor in the circuit. By the pulse-type stress voltage applied to the gate, the electrons and holes were injected to the gate dielectrics, and the threshold voltage could be adjusted ranging from 0.2V to 5.5V, which is suitable for controlling the incomplete reset operation due to the process variation. The charges trapped in the silicon nitride lead to the positive and negative shift of the threshold voltage, and this phenomenon is explained by Poole-Frenkel conduction and Fowler-Nordheim conduction. A CCD image sensor with $492(H){\;}{\times}{\;}510(V)$ pixels adopting this structure showed complete reset operation with the driving voltage of 3.0V. The resolution chart taken with the image sensor shows no image flow to the illumination of 30 lux, even in the driving voltage of 3.0V.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.36 no.3
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• pp.255-260
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• 2023

In order to spread LED lighting, LED lighting technology directly driven by alternating current (AC) commercial power has recently been introduced. Since current does not flow at a voltage lower than the threshold voltage of the LED, a non-conductive section occurs in the current waveform, and the higher the threshold voltage of the LED, the more discontinuous current waveforms are generated. In this paper, multi-LED modules are connected in series so that the threshold voltage can be adjusted according to the number of LED modules. A small number of LED modules are driven at a low instantaneous rectified voltage, and a large number of LED modules are driven at a high instantaneous rectified voltage to lengthen the overall lighting time of AC-LED lighting, thereby minimizing the luminance deviation of AC-LED lighting. In addition, the load current flowing through the LED module is adjusted to be the same as the design current even at the maximum rectified voltage higher than the design voltage, so that the light brightness of the LED module is kept constant. Therefore, even if the rectified voltage applied to the LED module changes, the AC-LED lighting in which the light brightness is constant and the luminance deviation is minimal has been realized.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.31 no.3
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• pp.146-151
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• 2018

In this study, we compared the threshold-voltage extraction methods of accumulation-type JLDG (junctionless double-gate) MOSFETs (metal-oxide semiconductor field-effect transistors). Threshold voltage is the most basic element of transistor design; therefore, accurate threshold-voltage extraction is the most important factor in integrated-circuit design. For this purpose, analytical potential distributions were obtained and diffusion-drift current equations for these potential distributions were used. There are the ${\phi}_{min}$ method, based on the physical concept; the linear extrapolation method; and the second and third derivative method from the $I_d-V_g$ relation. We observed that the threshold-voltages extracted using the maximum value of TD (third derivatives) and the ${\phi}_{min}$ method were the most reasonable in JLDG MOSFETs. In the case of 20 nm channel length or more, similar results were obtained for other methods, except for the linear extrapolation method. However, when the channel length is below 20 nm, only the ${\phi}_{min}$ method and the TD method reflected the short-channel effect.

• Journal of information and communication convergence engineering
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• v.9 no.6
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• pp.733-737
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• 2011

This paper has studied subthreshold characteristics for double gate(DG) MOSFET using Gaussian function in solving Poisson's equation. Typical two dimensional analytical transport models have been presented for symmetrical Double Gate MOSFETs (DGMOSFETs). Subthreshold swing and threshold voltage are very important factors for digital devices because of determination of ON and OFF. In general, subthreshold swings have to be under 100mV/dec, and threshold voltage roll-off small in short channel devices. These models are used to obtain the change of subthreshold swings and threshold voltage for DGMOSFET according to channel doping profiles. Also subthreshold swings and threshold voltages have been analyzed for device parameters such as channel length, channel thickness and channel doping profiles.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.15 no.7
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• pp.559-563
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• 2002

A threshold voltage model of SiC N-channel MOSFETs for high-temperature and hard radiation environments has been developed and verified by comparing with experimental results. The proposed model includes the difference in the work functions, the surface potential, depletion charges and SiC/$SiO_2$acceptor-like interface state charges as a function of temperature. Simulations of the model shoved that interface slates were the most dominant factor for the threshold voltage decrease as the temperature increase. To verify the model, SiC N-chnnel MOSFETS were fabricated and threshold voltages as a function of temperature were measured and compared wish model simulations. From these comparisons, extracted density of interface slates was $4{\times}10^{12}\textrm{cm}^{-2}eV^{-1}$.

• JSTS:Journal of Semiconductor Technology and Science
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• v.8 no.3
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• pp.221-226
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• 2008

A new two dimensional (2-D) analytical model for the Threshold Voltage on dual material surrounding gate (DMSG) MOSFETs is presented in this paper. The parabolic approximation technique is used to solve the 2-D Poisson equation with suitable boundary conditions. The simple and accurate analytical expression for the threshold voltage and sub-threshold swing is derived. It is seen that short channel effects (SCEs) in this structure is suppressed because of the perceivable step in the surface potential which screens the drain potential. We demonstrate that the proposed model exhibits significantly reduced SCEs, thus make it a more reliable device configuration for high speed wireless communication than the conventional single material surrounding gate (SMSG) MOSFETs.

• The Journal of Korea Institute of Information, Electronics, and Communication Technology
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• v.15 no.3
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• pp.205-210
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• 2022

A novel OLED pixel circuit is proposed in this paper that uses only n-type thin-film transistors(TFTs) to improve the luminance non-uniformity of the AMOLED display caused by the threshold voltage variation of an OLED driving TFT. The proposed OLED pixel circuit is composed of 6 n-channel TFTs and 2 capacitors. The operation of the proposed OLED pixel circuit consists of the capacitor initializing period, threshold voltage sensing period of an OLED·driving TFT, image data voltage writing period, and OLED·emitting period. As a result of SmartSpice simulation, when the threshold voltage of·OLED·driving TFT varies from 1.2 V to 1.8 V, the proposed OLED pixel circuit has a maximum current error of 5.18 % at IOLED = 1 nA. And, when the OLED cathode voltage rises by 0.1 V, the proposed OLED pixel circuit has very little change in the OLED current compared to the conventional OLED pixel circuit. Therefore, the proposed pixel circuit exhibits superior compensation characteristics for the threshold voltage variation of an OLED driving TFT and the rise of the OLED cathode voltage compared to the conventional OLED pixel circuit.

• Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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• 2012.10a
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• pp.818-821
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• 2012

This paper have analyzed the change of threshold voltage for conduction path of double gate(DG) MOSFET. The threshold voltage roll-off among the short channel effects of DGMOSFET have become obstacles of precise device operation. The analytical solution of Poisson's equation have been used to analyze the threshold voltage, and Gaussian function been used as carrier distribution to analyze closely for experimental results. The threshold voltages for conduction path have been analyzed for device parameters such as channel length, channel thickness, gate oxide thickness and doping concentration. Since this potential model has been verified in the previous papers, we have used this model to analyze the threshold voltage. Resultly, we know the threshold voltage is greatly influenced on the change of conduction path for device parameters of DGMOSFET.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.16 no.11
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• pp.2511-2516
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• 2012

This paper have analyzed the change of threshold voltage for conduction path of double gate(DG) MOSFET. The threshold voltage roll-off among the short channel effects of DGMOSFET have become obstacles of precise device operation. The analytical solution of Poisson's equation have been used to analyze the threshold voltage, and Gaussian function been used as carrier distribution to analyze closely for experimental results. The threshold voltages for conduction path have been analyzed for device parameters such as channel length, channel thickness, gate oxide thickness and doping concentration. Since this potential model has been verified in the previous papers, we have used this model to analyze the threshold voltage. Resultly, we know the threshold voltage is greatly influenced on the change of conduction path for device parameters of DGMOSFET.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.18 no.1
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• pp.135-141
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• 2014

In this paper, the device design guideline to reduce the threshold voltage variation with fin width in junctionless MuGFET has been suggested. It has been observed that the threshold voltage variation was increased with increase of fin width in junctionless MuGFETs. To reduce the threshold voltage variation with fin width in junctionless MuGFETs, 3-dimensional device simulation with different gate dielectric materials, silicon film thickness, and an optimized fin number has been performed. The simulation results showed that the threshold voltage variation can be reduced by the gate dielectric materials with a high dielectric constant such as $La_2O_3$ and the silicon film with ultra-thin thickness even though the fin width is increased. Particularly, the reduction of the threshold voltage variation and the subthreshold slope by reducing the fin width and increasing the fin numbers is known the optimized device design guideline in junctionless MuGFETs.