Journal of the Korean Institute of Electrical and Electronic Material Engineers (한국전기전자재료학회논문지)

The Korean Institute of Electrical and Electronic Material Engineers (한국전기전자재료학회)
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Modeling the Threshold Voltage of SiC MOSFETs for High Temperature Applications

고온 응용을 위한 SiC MOSFET 문턱전압 모델

  • 이원선 (충북대학교 전기전자및컴퓨터공학부) ;
  • 오충완 (충북대학교 전기전자및컴퓨터공학부) ;
  • 최재승 (충북대학교 전기전자및컴퓨터공학부) ;
  • 신동현 (충북대학교 전기전자및컴퓨터공학부) ;
  • 이형규 (충북대학교 전기전자및컴퓨터공학부) ;
  • 박근형 (충북대학교 전기전자및컴퓨터공학부) ;
  • 김영석 (충북대학교 전기전자및컴퓨터공학부)
  • Published : 2002.07.01
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Abstract

A threshold voltage model of SiC N-channel MOSFETs for high-temperature and hard radiation environments has been developed and verified by comparing with experimental results. The proposed model includes the difference in the work functions, the surface potential, depletion charges and SiC/$SiO_2$acceptor-like interface state charges as a function of temperature. Simulations of the model shoved that interface slates were the most dominant factor for the threshold voltage decrease as the temperature increase. To verify the model, SiC N-chnnel MOSFETS were fabricated and threshold voltages as a function of temperature were measured and compared wish model simulations. From these comparisons, extracted density of interface slates was $4{\times}10^{12}\textrm{cm}^{-2}eV^{-1}$.

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References

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