• 제목/요약/키워드: Threshold-Voltage

검색결과 1,291건 처리시간 0.038초

영상센서를 위한 비정질 실리콘 박막트랜지스터의 제작 및 특성 (Fabrication and Characteristics of a-Si : H TFT for Image Sensor)

  • 김영진;박욱동;김기완;최규만
    • 센서학회지
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    • 제2권1호
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    • pp.95-99
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    • 1993
  • 영상 센서를 위한 비정질 실리콘 박막트랜지스터 (a-Si : HTFT)를 제작하고 그 동작 특성 을 조사하였다. 게이트 절연막으로는 비정질 실리콘 질화막(a-SiN : H)을 증착하였으며 소오스와 드레인 영역에서의 저항성 접합을 위해 $n^{+}$ 형 비정질 실리콘($n^{+}$-a-Si : H)을 증착하였다. 이 때 a-SiN : H막과 a-Si : H막의 두께는 각각 $2000{\AA}$, $n^{+}$-a-Si : H막의 두께는 $500{\AA}$이었다. 또한 a-Si : H TFT의 채널길이와 채널폭은 각각 $50{\mu}m$$1000{\mu}m$였다. 본 연구에서 제작한 a-Si : H TFT의 ON/OFF 전류비는 $10^{5}$, 문턱전압은 6.3 V 그리고 전계효과 이동도는 $0.15cm^{2}/V{\cdot}s$로 나타났다.

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$1.06/1.32{\mu}m$ Nd:YAG 레이저 개발 및 치과용 임상적용 연구 (Development of $1.06/1.32{\mu}m$ Nd:YAG Laser and Dental Applications)

  • 윤길원;김흥식;홍태민;김주병;이상철;김원기;;;김정혜;오세림;문조웅
    • 대한의용생체공학회:학술대회논문집
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    • 대한의용생체공학회 1996년도 추계학술대회
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    • pp.192-196
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    • 1996
  • [ $1.06/1.32{\mu}m$ ] dual-wavelength medical laser was developed and preliminary clinical comparisons at these two wavelengths were performed for dental application. We could develop a compact laser system 1) by lasing two wavelengths from the same Nd:YAG rod, and 2) by introducing high-voltage switching power supply modules. Experiment on gingiva of pig jaw showed higher thermal damage at $1.32{\mu}m$. Depending on particular procedures, each wavelength has its own advantages and disadvantages. For cutting, however, using conical tips rather than bare fibers provided better results with low threshold of cutting energy and less surrounding thermal damage. Appling light-absorbing dye on target area appeared to induce more damage during laser irradiation. However, histological studies showed no significant difference whether dye was applied or not.

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통전전류 특성을 이용한 모터 기동용 전해 커패시터 폭발 방지 방법 (The Explosion Prevention Method for Electrolytic Motor Start Capacitors using Current Characteristic)

  • 김재현;박진영;박광묵;방선배;김용운
    • 전기학회논문지
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    • 제66권12호
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    • pp.1836-1843
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    • 2017
  • In this paper, we investigated fire cases those are believed to be caused by explosion of a electrolytic motor start capacitor. Using two types of commercially available electrolytic motor start capacitors, capacitor current and the possibility of capacitor explosion were tested. And the ignition possibility of the internal material leaked from a capacitor was also tested. In addition, experiments were conducted to see if the fire could spread when a capacitor was exposed to an external flame. From our test we observed that the current of the electrolytic motor start capacitor rose continuously to a certain level by product, if the capacitor was continuously energized with working voltage, and then the capacitor was exploded. The gas and liquid leaked from the capacitor by the explosion could ignite by an electric arc and an external flame. The capacitor current at explosion was different product by product, but each product had a certain current level at explosion. And the increase rate of the capacitor current until explosion was 24% and 31% for the products used in the experiment. We proposed the capacitor explosion prevention method that cuts off power when the capacitor current rises to a certain threshold level. The proposed method can be used if the current of the applied electrolytic motor start capacitor rises continuously and then the capacitor is exploded at a certain current level when the capacitor is energized continuously.

자계 유도 고상결정화를 이용한 다결정 실리콘 박막 트랜지스터의 채널 길이와 드레인 전압에 따른 문턱 전압 변화 (Effect of Channel Length and Drain Bias on Threshold Voltage of Field Enhanced Solid Phase Crystallization Polycrystalline Thin Film Transistor on the Glass Substrate)

  • 강동원;이원규;한상면;박상근;한민구
    • 대한전기학회:학술대회논문집
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    • 대한전기학회 2007년도 제38회 하계학술대회
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    • pp.1263-1264
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    • 2007
  • 자계 유도 고상결정화(FESPC)를 이용하여 제작한 다결정실리콘(poly-Si) 박막 트랜지스터(TFT)는 비정질 실리콘 박막 트랜지스터(a-Si:H TFT)보다 뛰어난 전기적 특성과 우수한 안정성을 지닌다. $V_{DS}$ = -0.1 V에서 채널 폭과 길이가 각각 $5\;{\mu}m$, $7\;{\mu}m$인 P형 TFT의 이동도(${\mu}$)와 문턱 전압($V_{TH}$)은 각각 $31.98\;cm^2$/Vs, -6.14 V 이다. FESPC TFT는 일반 poly-Si TFT에 비해 채널 내 결정 경계 숫자가 많아서 상대적으로 열악한 특성을 가진다. 채널 길이 $5\;{\mu}m$인 TFT의 $V_{TH}$는 채널 길이 $18\;{\mu}m$ 소자의 $V_{TH}$보다 1.36V 작지만, 일반적으로 큰 값이다. 이 현상은 채널에 다수의 결정 경계가 존재하고, 수평 전계가 크기 때문이다. 수평 전계가 증가하면, 결정 경계의 전위 장벽 높이가 감소하게 되는데, 이는 DIGBL 효과이다. ${\mu}$의 증가에 따라서, 드레인 전류가 증가하고 $V_{TH}$은 감소한다. 활성화 에너지($E_a$)는 드레인 전압과 결정 경계의 수에 따라 변하는데, 드레인 전압이 크거나 결정 경계의 수가 감소하면 $E_a$는 감소한다. $E_a$가 감소하면 $V_{TH}$가 감소한다. 유리기판 위의 FESPC를 이용한 P형 poly-Si TFT의 $V_{TH}$는 채널의 길이와 $V_{DS}$에 영향을 받는다. 증가한 수평 전계가 결정 경계에서 에너지 장벽을 낮추는 효과를 일으키기 때문이다.

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SiGe/Si 이종접합구조의 채널을 이용한 SOI n-MOSFET의 DC 특성 (DC Characteristic of Silicon-on-Insulator n-MOSFET with SiGe/Si Heterostructure Channel)

  • 최아람;최상식;양현덕;김상훈;이상흥;심규환
    • 한국전기전자재료학회:학술대회논문집
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    • 한국전기전자재료학회 2006년도 하계학술대회 논문집 Vol.7
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    • pp.99-100
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    • 2006
  • Silicon-on-insulator(SOI) MOSFET with SiGe/Si heterostructure channel is an attractive device due to its potent use for relaxing several limits of CMOS scaling, as well as because of high electron and hole mobility and low power dissipation operation and compatibility with Si CMOS standard processing. SOI technology is known as a possible solution for the problems of premature drain breakdown, hot carrier effects, and threshold voltage roll-off issues in sub-deca nano-scale devices. For the forthcoming generations, the combination of SiGe heterostructures and SOI can be the optimum structure, so that we have developed SOI n-MOSFETs with SiGe/Si heterostructure channel grown by reduced pressure chemical vapor deposition. The SOI n-MOSFETs with a SiGe/Si heterostructure are presented and their DC characteristics are discussed in terms of device structure and fabrication technology.

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나노결정 InGaZnO 산화물 박막트랜지스터와 비결정 InGaZnO 산화물 박막트랜지스터의 소자 신뢰성에 관한 비교 연구 (Comparison of Stability on the Nano-crystalline Embedded InGaZnO and Amorphous InGaZnO Oxide Thin-film Transistors)

  • 신현수;안병두;임유승;김현재
    • 한국전기전자재료학회논문지
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    • 제24권6호
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    • pp.473-479
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    • 2011
  • In this paper, we have compared amorphous InGaZnO (a-IGZO) thin-film transistor (TFT) with the nano-crystalline embedded-IGZO ($N_c$-embedded-IGZO) TFT fabricated by solid-phase crystallization (SPC) technique. The field effect mobility (${\mu}_{FE}$) of $N_c$-embedded-IGZO TFT was 2.37 $cm^2/Vs$ and the subthreshold slope (S-factor) was 0.83 V/decade, which showed lower performance than those of a-IGZO TFT (${\mu}_{FE}$ of a-IGZO was 9.67 $cm^2/Vs$ and S-factor was 0.19 V/decade). This results originated from generation of oxygen vacancies in oxide semiconductor and interface between gate insulator and semiconductor due to high temperature annealing process. However, the threshold voltage shift (${\Delta}V_{TH}$) of $N_c$-embedded-IGZO TFT was 0.5 V, which showed 1 V less shift than that of a-IGZO TFT under constant current stress during $10^5$ s. This was because there were additionally less increase of interface trap charges in Nc-embedded-IGZO TFT than a-IGZO TFT.

InGaZnO 박막 트랜지스터의 전기 및 광학적 특성에 대한 전자빔 조사의 영향 (Influence of Electron Beam Irradiation on the Electrical and Optical Properties of InGaZnO Thin Film Transistor)

  • 조인환;박해웅;김찬중;전병혁
    • 한국재료학회지
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    • 제27권6호
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    • pp.345-349
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    • 2017
  • The effects of electron beam(EB) irradiation on the electrical and optical properties of InGaZnO(IGZO) thin films fabricated using a sol-gel process were investigated. As the EB dose increased, the electrical characteristic of the IGZO TFTs changed from semiconductor to conductor, and the threshold voltage values shifted to the negative direction. X-ray photoelectron spectroscopy analysis of the O 1s core level showed that the relative area of oxygen vacancies increased from 14.68 to 19.08 % as the EB dose increased from 0 to $1.5{\times}10^{16}electrons/cm^2$. In addition, spectroscopic ellipsometer analysis showed that the optical band gap varied from 3.39 to 3.46 eV with increasing EB dose. From the result of band alignment, it was confirmed that the Fermi level($E_F$) of the sample irradiated with $1.5{\times}10^{16}electrons/cm^2$ was located at the closest position to the conduction band minimum(CBM) due to the increase of electron carrier concentration.

Effects of multi-stacked hybrid encapsulation layers on the electrical characteristics of flexible organic field effect transistors

  • 설영국;허욱;박지수;이내응
    • 한국진공학회:학술대회논문집
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    • 한국진공학회 2009년도 제38회 동계학술대회 초록집
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    • pp.257-257
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    • 2010
  • One of the critical issues for applications of flexible organic thin film transistors (OTFTs) for flexible electronic systems is the electrical stabilities of the OTFT devices, including variation of the current on/off ratio ($I_{on}/I_{off}$), leakage current, threshold voltage, and hysteresis, under repetitive mechanical deformation. In particular, repetitive mechanical deformation accelerates the degradation of device performance at the ambient environment. In this work, electrical stabilities of the pentacene organic thin film transistors (OTFTs) employing multi-stack hybrid encapsulation layers were investigated under mechanical cyclic bending. Flexible bottom-gated pentacene-based OTFTs fabricated on flexible polyimide substrate with poly-4-vinyl phenol (PVP) dielectric as a gate dielectric were encapsulated by the plasma-deposited organic layer and atomic layer deposited inorganic layer. For cyclic bending experiment of flexible OTFTs, the devices were cyclically bent up to $10^5$ times with 5mm bending radius. In the most of the devices after $10^5$ times of bending cycles, the off-current of the OTFT with no encapsulation layers was quickly increased due to increases in the conductivity of the pentacene caused by doping effects from $O_2$ and $H_2O$ in the atmosphere, which leads to decrease in the $I_{on}/I_{off}$ and increase in the hysteresis. With encapsulation layers, however, the electrical stabilities of the OTFTs were improved significantly. In particular, the OTFTs with multi-stack hybrid encapsulation layer showed the best electrical stabilities up to the bending cycles of $10^5$ times compared to the devices with single organic encapsulation layer. Changes in electrical properties of cyclically bent OTFTs with encapsulation layers will be discussed in detail.

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Comparative Study of Thermal Annealing and Microwave Annealing in a-InGaZnO Used to Pseudo MOSFET

  • 문성완;조원주
    • 한국진공학회:학술대회논문집
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    • 한국진공학회 2013년도 제45회 하계 정기학술대회 초록집
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    • pp.241.2-241.2
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    • 2013
  • 최근, 비정질 산화물 반도체 thin film transistor (TFT)는 수소화된 비정질 실리콘 TFT와 비교하여 높은 이동도와 큰 on/off 전류비, 낮은 구동 전압을 가짐으로써 빠른 속도가 요구되는 차세대 투명 디스플레이의 TFT로 많은 연구가 진행되고 있다. 한편, 기존의 MOSFET 제작 시 우수한 박막을 얻기 위해서는 $500^{\circ}C$ 이상의 높은 열처리 온도가 필수적이며 이는 유리 기판과 플라스틱 기판에 적용하는 것이 적합하지 않고 높은 온도에서 수 시간 동안 열처리를 수행해야 하므로 공정 시간 및 비용이 증가하게 된다는 단점이 있다. 따라서, 본 연구에서는 RF sputter를 이용하여 증착된 비정질 InGaZnO pesudo MOSFET 소자를 제작하였으며, thermal 열처리와 microwave 열처리 방식에 따른 전기적 특성을 비교 및 분석하고 각 열처리 방식의 열처리 온도 및 조건을 최적화하였다. P-type bulk silicon 위에 산화막이 100 nm 형성된 기판에 RF 스퍼터링을 이용하여 InGaZnO 분말을 각각 1:1:2mol% 조성비로 혼합하여 소결한 타겟을 사용하여 70 nm 두께의 InGaZnO를 증착하였다. 연속해서 Photolithography 공정과 BOE(30:1) 습식 식각 과정을 이용해 활성화 영역을 형성하여 소자를 제작하였다. 제작 된 소자는 pseudo MOSFET 구조이며, 프로브 탐침을 증착 된 채널층 표면에 직접 접촉시켜 소스와 드레인 역할을 대체하여 동작시킬 수 있어 전기적 특성을 간단하고 간략화된 공정과정으로 분석할 수 있는 장점이 있다. 열처리 조건으로는 thermal 열처리의 경우, furnace를 이용하여 각각 $300^{\circ}C$, $400^{\circ}C$, $500^{\circ}C$, $600^{\circ}C$에서 30분 동안 N2 가스 분위기에서 열처리를 실시하였고, microwave 열처리는 microwave를 이용하여 각각 400 W, 600 W, 800 W, 1000 W로 20분 동안 실시하였다. 그 결과, furnace를 이용하여 열처리한 소자와 비교하여 microwave 를 통해 열처리한 소자에서 subthreshold swing (SS), threshold voltage (Vth), mobility 등이 개선되는 것을 확인하였다. 따라서, microwave 열처리 공정은 향후 저온 공정을 요구하는 MOSFET 제작 시의 훌륭한 대안으로 사용 될 것으로 기대된다.

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ZnO 나노선과 P3HT 폴리머를 이용한 유/무기 복합체 TFT 소자 (ZnO Nanowires and P3HT Polymer Composite TFT Device)

  • 문경주;최지혁;;명재민
    • 한국재료학회지
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    • 제19권1호
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    • pp.33-36
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    • 2009
  • Inorganic-organic composite thin-film-transistors (TFTs) of ZnO nanowire/Poly(3-hexylthiophene) (P3HT) were investigated by changing the nanowire densities inside the composites. Crystalline ZnO nanowires were synthesized via an aqueous solution method at a low temperature, and the nanowire densities inside the composites were controlled by changing the ultrasonifiaction time. The channel layers were prepared with composites by spin-coating at 2000 rpm, which was followed by annealing in a vacuum at $100^{\circ}C$ for 10 hours. Au/inorganic-organic composite layer/$SiO_2$ structures were fabricated and the mobility, $I_{on}/I_{off}$ ratio, and threshold voltage were then measured to analyze the electrical characteristics of the channel layer. Compared with a P3HT TFT, the electrical properties of TFT were found to be improved after increasing the nanowire density inside the composites. The mobility of the P3HT TFT was approximately $10^{-4}cm^2/V{\cdot}s$. However, the mobility of the ZnO nanowire/P3HT composite TFT was increased by two orders compared to that of the P3HT TFT. In terms of the $I_{on}/I_{off}$ ratio, the composite device showed a two-fold increase compared to that of the P3HT TFT.