• Title/Summary/Keyword: Threshold-Voltage

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Grain distribution and electrical property according to grain size variation in polysilicon TFTs (다결정 실리콘 TFT소자의 채널길이 변화에 따른 grain의 분포와 전기적 특성)

  • Lee, Eun-Nyung;Song, Ho-Young;Park, Se-Geun;Lee, Taek-Joo;O, Beom-Hoan;Lee, Seung-Gol;Lee, El-Hang
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2003.11a
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    • pp.128-131
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    • 2003
  • The number of grain is determined based on Poisson distribution in respectively different active channel and it is converted to grain size which affects to the mobility and threshold voltage. the acquired data is applied to the SPICE for observing the variation of I-V characteristic with several channel lengths. we can confirm the effect on device.

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A study on Improvement of $30{\AA}$ Ultra Thin Gate Oxide Quality (얇은 게이트 산화막 $30{\AA}$에 대한 박막특성 개선 연구)

  • Eom, Gum-Yong
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2004.07a
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    • pp.421-424
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    • 2004
  • As the deep sub-micron devices are recently integrated high package density, novel process method for sub $0.1{\mu}m$ devices is required to get the superior thin gate oxide characteristics and reliability. However, few have reported on the electrical quality and reliability on the thin gate oxide. In this paper I will recommand a novel shallow trench isolation structure for thin gate oxide $30{\AA}$ of deep sub-micron devices. Different from using normal LOCOS technology, novel shallow trench isolation have a unique 'inverse narrow channel effects' when the channel width of the devices is scaled down shallow trench isolation has less encroachment into the active device area. Based on the research, I could confirm the successful fabrication of shallow trench isolation(STI) structure by the SEM, in addition to thermally stable silicide process was achiever. I also obtained the decrease threshold voltage value of the channel edge and the contact resistance of $13.2[\Omega/cont.]$ at $0.3{\times}0.3{\mu}m^2$. The reliability was measured from dielectric breakdown time, shallow trench isolation structure had tile stable value of $25[%]{\sim}90[%]$ more than 55[sec].

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The Effect of Adhesion layer on Gate Insulator for OTFTs (OTFT의 게이트 절연막에 사용된 점착층에 대한 영향)

  • Lee, Dong-Hyun;Hyung, Gun-Woo;Pyo, Sang-Woo;Kim, Jung-Soo;Kim, Young-Kwan
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2005.07a
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    • pp.70-71
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    • 2005
  • The electrical performances of organic thin-film transistors (OTFTs) have been improved for the last decade. In this paper, it was demonstrated that the electrical characteristics of the organic thin film transistors (OTFTs) were improved by using polymeric material as adhesion layer on gate insulator. We have investigated OTFTs with polyimide adhesion layer which was fabricated by vapor deposition polymerization (VDP) processing and formed by co-deposition of 6FDA and ODA. It was found that the OTFTs with adhesion layer showed better electrical characteristics than with bare layer because of good matching between semiconductor and gate insulator. Our devices of performance are field effect mobility of $0.4cm^2$/Vs, threshold voltage of -0.8 V and on-of current ratio of $10^6$. In addition, to improve the electrical characteristics of OTFT, we have reduced the thickness of adhesion layer up to a few nanometrs.

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Study on Thermal Stability of Liquid Crystal Display for Projection TV Application (프로젝션 TV 적용을 위한 액정 디스플레이의 열적 안전성에 관한 연구)

  • Kang, Hee-Jin;Hwang, Jeoung-Yeon;Kang, Hyung-Ku;Bae, Yu-Han;Lee, Whee-Won;Kim, Young-Hwan;Seo, Dae-Shik
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2005.05a
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    • pp.177-180
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    • 2005
  • We have investigated electro-optical characteristics in three kinds of TN cells on the polyimide surface. Transmittance of no thermal stressed TN cells were better than that of thermal stressed TN cells. Also. the threshold voltage and the response time of thermal stressed TN cells were same that of no thermal stressed TN cells. There were little change of value in these TN cells. On the other hand. transmittances of TN cells on the polyimide surface decreased by increasing thermal stress time. Moreover. the residual DC of the thermal stressed TN cells on the polyimide surface showed the characteristics of thermal stressed TN cells were weakened as increasing thermal stress temperature and time. Therefore. thermal stability of TN cells were decreased gradually by giving high thermal stress for a long time.

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Dependency of the Device Characteristics on Plasma Nitrided Oxide for Nano-scale PMOSFET (Nano-scale PMOSFET에서 Plasma Nitrided Oixde에 대한 소자 특성의 의존성)

  • Han, In-Shik;Ji, Hee-Hwan;Goo, Tae-Gyu;You, Ook-Sang;Choi, Won-Ho;Park, Sung-Hyung;Lee, Heui-Seung;Kang, Young-Seok;Kim, Dae-Byung;Lee, Hi-Deok
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.20 no.7
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    • pp.569-574
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    • 2007
  • In this paper, the reliability (NBTI degradation: ${\Delta}V_{th}$) and device characteristic of nano-scale PMOSFET with plasma nitrided oxide (PNO) is characterized in depth by comparing those with thermally nitrided oxide (TNO). PNO case shows the reduction of gate leakage current and interface state density compared to TNO with no change of the $I_{D.sat}\;vs.\;I_{OFF}$ characteristics. Gate oxide capacitance (Cox) of PNO is larger than TNO and it increases as the N concentration increases in PNO. PNO also shows the improvement of NBTI characteristics because the nitrogen peak layer is located near the $Poly/SiO_2$ interface. However, if the nitrogen concentration in PNO oxide increases, threshold voltage degradation $({\Delta}V_{th})$ becomes more degraded by NBT stress due to the enhanced generation of the fixed oxide charges.

Effects of Organic Passivation Layers by Vapor Deposition Polymerization(VDP) for Organic Thin-Film Transistors(OTFTs) (Vapor Deposition Polymerization(VDP)을 이용한 페시베이션이 유기박막트렌지스터에 주는 영향)

  • Park, Il-Houng;Hyung, Gun-Woo;Choi, Hak-Bum;Kim, Jae-Hyeuk;Kim, Woo-Young;Kim, Young-Kwan
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2007.06a
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    • pp.114-115
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    • 2007
  • In this paper, it was demonstrated that organic thin-film transistors (OTFTs) were fabricated with the organic passivation layer by vapor deposition polymerization (VDP) processing, In order to form polymeric film as an passivation layer, VDP process was also introduced instead of spin-coating process, where polymeric film was co-deposited by high-vacuum thermal evaporation from 6FDA and ODA followed by curing, Field effect mobility, threshold voltage, and on-off current ratio with 450-nm-thick organic passivation layer were about $0.21\;cm^2/Vs$, IV, and $1\;{\times}\;10^5$, respectively.

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High-performance thin-film transistor with a novel metal oxide channel layer

  • Son, Dae-Ho;Kim, Dae-Hwan;Kim, Jung-Hye;Sung, Shi-Joon;Jung, Eun-Ae;Kang, Jin-Kyu
    • Proceedings of the Korean Vacuum Society Conference
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    • 2010.02a
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    • pp.222-222
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    • 2010
  • Transparent semiconductor oxide thin films have been attracting considerable attention as potential channel layers in thin film transistors (TFTs) owing to their several advantageous electrical and optical characteristics such as high mobility, high stability, and transparency. TFTs with ZnO or similar metal oxide semiconductor thin films as the active layer have already been developed for use in active matrix organic light emitting diode (AMOLED). Of late, there have been several reports on TFTs fabricated with InZnO, AlZnSnO, InGaZnO, or other metal oxide semiconductor thin films as the active channel layer. These newly developed TFTs were expected to have better electrical characteristics than ZnO TFTs. In fact, results of these investigations have shown that TFTs with the new multi-component material have excellent electrical properties. In this work, we present TFTs with inverted coplanar geometry and with a novel HfInZnO active layer co-sputtered at room temperature. These TFTs are meant for use in low voltage, battery-operated mobile and flexible devices. Overall, the TFTs showed good performance: the low sub-threshold swing was low and the $I_{on/off}$ ratio was high.

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An Reliable Non-Volatile Memory using Alloy Nano-Dots Layer with Extremely High Density

  • Lee, Gae-Hun;Kil, Gyu-Hyun;An, Ho-Joong;Song, Yun-Heup
    • Proceedings of the Korean Vacuum Society Conference
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    • 2010.02a
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    • pp.241-241
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    • 2010
  • New non-volatile memory with high density and high work-function metal nano-dots, MND (Metal Nano-Dot) memory, was proposed and fundamental characteristics of MND capacitor were evaluated. In this work, nano-dot layer of FePt with high density and high work-function (~5.2eV) was fabricated as a charge storage site in non-volatile memory, and its electrical characteristics were evaluated for the possibility of non-volatile memory in view of cell operation by Fowler-Nordheim (FN)-tunneling. Here, nano-dot FePt layer was controlled as a uniform single layer with dot size of under ~ 2nm and dot density of ${\sim}\;1.2{\times}10^{13}/cm^2$. Electrical measurements of MOS structure with FePt nano-dot layer shows threshold voltage window of ~ 6V using FN programming and erasing, which is satisfied with operation of the non-volatile memory. Furthermore, this structure provides better data retention characteristics compared to other metal dot materials with the similar dot density in our experiments. From these results, it is expected that this non-volatile memory using FePt nano-dot layer with high dot density and high work-function can be one of candidate structures for the future non-volatile memory.

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Cell Characteristics of a Multiple Alloy Nano-Dots Memory Structure

  • Kil, Gyu-Hyun;Lee, Gae-Hun;An, Ho-Joong;Song, Yun-Heup
    • Proceedings of the Korean Vacuum Society Conference
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    • 2010.02a
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    • pp.240-240
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    • 2010
  • A multiple alloy metal nano-dots memory using FN tunneling was investigated in order to confirm its structural possibility for future flash memory. In this work, a multiple FePt nano-dots device with a high work function (~5.2 eV) and extremely high dot density (${\sim}\;1.2{\times}10^{13}/cm^2$) was fabricated. Its structural effect for multiple layers was evaluated and compared to one with a single layer in terms of the cell characteristics and reliability. We confirm that MOS capacitor structures with 2-4 multiple FePt nano-dot layers provide a larger threshold voltage window and better retention characteristics. Furthermore, it was also revealed that several process parameters for block oxide and inter-tunnel oxide between the nano-dot layers are very important to improve the efficiency of electron injection into multiple nano-dots. From these results, it is expected that a multiple FePt nano-dots memory using Fowler-Nordheim (FN)-tunneling could be a candidate structure for future flash memory.

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Characteristics of IGZO Thin Film Transistor Deposited by DC Magnetron Sputtering (DC 마그네트론 스퍼터링 방법을 이용하여 증착한 IGZO 박막트랜지스터의 특성)

  • Kim, Sung-Yeon;Myoung, Jae-Min
    • Korean Journal of Materials Research
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    • v.19 no.1
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    • pp.24-27
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    • 2009
  • Indium Gallium Zinc Oxide (IGZO) thin films were deposited onto 300 nm-thick oxidized Si substrates and glass substrates by direct current (DC) magnetron sputtering of IGZO targets at room temperature. FESEM and XRD analyses indicate that non-annealed and annealed IGZO thin films exhibit an amorphous structure. To investigate the effect of an annealing treatment, the films were thermally treated at $300^{\circ}C$ for 1hr in air. The IGZO TFTs structure was a bottom-gate type in which electrodes were deposited by the DC magnetron sputtering of Ti and Au targets at room temperature. The non-annealed and annealed IGZO TFTs exhibit an $I_{on}/I_{off}$ ratio of more than $10^5$. The saturation mobility and threshold voltage of nonannealed IGZO TFTs was $4.92{\times}10^{-1}cm^2/V{\cdot}s$ and 1.46V, respectively, whereas these values for the annealed TFTs were $1.49{\times}10^{-1}cm^2/V{\cdot}$ and 15.43V, respectively. It is believed that an increase in the surface roughness after an annealing treatment degrades the quality of the device. The transmittances of the IGZO thin films were approximately 80%. These results demonstrate that IGZO thin films are suitable for use as transparent thin film transistors (TTFTs).