• Journal of Power Electronics
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• v.18 no.2
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• pp.407-417
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• 2018

A novel family of Buck mode three-level direct ac converters with a high frequency link is proposed. These converters can transfer an unsteady high ac voltage with distortion into a regulated sinusoidal voltage with a low THD at the same frequency. The circuit configuration is constituted of a three-level converter, high frequency transformer, cycloconverter, as well as input and output filters. The topological family includes forward, push-pull, half-bridge, and full-bridge modes. In order to achieve a reliable three-level ac-ac conversion, and to overcome the surge voltage and surge current of the cycloconverter, a phase-shifted control strategy is introduced in this paper. A prototype is presented with experimental results to demonstrate that the proposed converters have five advantages including high frequency electrical isolation, lower voltage stress of the power switches, bi-directional power flow, low THD of the output voltage, and a higher input power factor.

• Journal of Power Electronics
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• v.18 no.2
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• pp.375-382
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• 2018

A novel active controlled primary current cutting-off zero-voltage and zero-current switching (ZVZCS) PWM three-level dc-dc converter (TLC) is proposed in this paper. The proposed converter has some attractive advantages. The OFF voltage on the primary switches is only Vin/2 due to the series connected structure. The leading-leg switches can obtain zero-voltage switching (ZVS), and the lagging-leg switches can achieve zero-current switching (ZCS) in a wide load range. Two MOSFETs, referred to as cutting-off MOSFETs, with an ultra-low on-state resistance are used as active controlled primary current cutting-off components, and the added conduction loss can be neglected. The added MOSFETs are switched ON and OFF with ZCS that is irrelevant to the load current. Thus, the auxiliary switching loss can be significantly minimized. In addition, these MOSFETs are not series connected in the circuit loop of the dc input bus bar and the primary switches, which results in a low parasitic inductance. The operation principle and some relevant analyses are provided, and a 6-kW laboratory prototype is built to verify the proposed converter.

• Journal of Power Electronics
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• v.15 no.2
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• pp.378-388
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• 2015

This paper proposes a pulse width modulation (PWM)-based sliding mode controller (SMC) for a full-bridge DC-DC converter that can eliminate static output voltage error. Hysteretic SMC in DC-DC converter does not have a fixed switching frequency, and applying hysteretic SMC to full-bridge converters is difficult. Fixed-frequency SMC, which is also called PWM-based SMC, based on equivalent control overcomes these shortcomings. However, the controller order reduction in equivalent control in PWM-based SMC causes static output voltage error. To resolve this issue, an integral item is added to the PWM-based SMC. Sliding mode coefficients are designed by applying a standard second-order system to the sliding mode surface. The effect of adding an integral item on the controller is analyzed, and an integral coefficient design method is proposed. Experiment results on a three-level full-bridge DC-DC converter verify the control scheme and design method proposed in this paper.

• Proceedings of the KIEE Conference
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• 2007.04c
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• pp.201-204
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• 2007

This paper proposes a improvement of switching converter's input wave form using VIENNA Rectifier(three-phase three-switch three-level PWM Rectifier). VIENNA Rectifier is based on the combination of a three-phase diode bridge and dc/dc boost converter. It can be available to get sinusoidal mains current, and low-blocking voltage stress on rower transistors. In addition, it can control output voltage.

• Journal of Power Electronics
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• v.16 no.5
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• pp.1735-1742
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• 2016

This paper proposes an interleaved five-level boost converter based on a switched-capacitor network. The operating principle of the converter under the CCM mode is analyzed. A high voltage gain, low component stress, small input current ripple, and self-balancing function for the capacitor voltages in the switched-capacitor networks are achieved. In addition, a three-loop control strategy including an outer voltage loop, an inner current loop and a voltage-balance loop has been researched to achieve good performances and voltage-balance effect. An experimental study has been done to verify the correctness and feasibility of the proposed converter and control strategy.

• Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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• v.16 no.6
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• pp.66-73
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• 2002

This paper presents ZVZCS(Zero-Voltage and Zero-Current Switching) Three Level DC/DC Converter without primary freewheeling diodes. The new converter presented in this paper used a phase shirt control with a flying capacitor in the primary side to achieve ZVS for the outer switches. A secondary anxiliary circuit which consists of one small capacitor, two small diodes and one coupled inductor, is added in the secondary to provide ZVZCS conditions to primary switches, ZVS for outer switches and ZCS for inner switches. Many advantages include simple secondary auxiliary circuit topology, high efficiency, and low cost make the new converter attractive for high power applications. Also the circulating current flows through the circuit so that it causes the needless coduction loss to be occurred in the devices and the transformer of the circuit The new converter has no primary auxiliary diodes for freewheeling current. The principle of operation, feature and design considerations are illustrated and verified through the experiment with a 1[㎾］ 50[KHz］IGBT based experimental circuit.

• Journal of Power Electronics
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• v.19 no.1
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• pp.108-118
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• 2019

This paper proposes a DC-link voltage balance controller using the fourth-phase of a three-level neutral-point clamped (NPC) PWM converter with medium vector selection (MVS) PWM for common-mode voltage reduction. MVS PWM makes the voltage reference by synthesizing the voltage vectors that cannot generate common-mode voltage. This PWM method is effective for reducing the EMI noise emitted from converter systems. However, the DC-link voltage imbalance problem is caused by the use of limited voltage vectors. Therefore, in this paper, the effect of MVS PWM on the DC-link voltage of a three-level NPC converter is analyzed. Then a proportional-derivative (PD) controller for the DC-link voltage balance is designed from the DC-link modeling. In addition, feedforward compensation of the neutral point current is included in the proposed PD controller. The effectiveness of the proposed controller is verified by experimental results.

• Proceedings of the KIEE Conference
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• 2006.10d
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• pp.173-176
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• 2006

This paper discusses the ZVS/ ZVZCS Three-Level converter using the minimum auxiliary circuit. A primary auxiliary circuit, which consists of one coupled inductor is added in the primary circuit to provide ZVZCS conditions to primary switches. ZVS is for outer switches and ZCS or ZVS is for inner switches. Many advantages including simple circuit topology high efficiency, and low cost make this converter attractive for high power applications. The principle of operation, feature and design considerations arc illustrated and verified through the experiment with a 2kHz 400kHz IGBT based experimental circuit.

• Proceedings of the KIEE Conference
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• 2009.04b
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• pp.161-164
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• 2009

This paper presents the ZVZCS(Zero Voltage and Zero-Current-Switching) Three-Level converter using the secondary coupled inductor and auxiliary capacitor. The converter with phase-shift control is proposed to reduce the circulating loss in primary and the voltage stress in secondary side. Using a coupled winding of the output inductor, two auxiliary capacitors are generated to reset the primary current at circulating interval.

• The Transactions of the Korean Institute of Power Electronics
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• v.27 no.5
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• pp.446-454
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• 2022

This study proposes a carrier-based pulse width modulation (PWM) method for leakage current reduction and neutral point (NP) current control in a three-phase three-level converter, which is a carrier-based PWM version of the previously proposed low-frequency common mode voltage PWM. Three groups of space vectors with the same common mode voltage are used. When the averaged NP current needs to be positive or negative, the specific groups are employed to produce low-frequency common mode voltages. The validity of the proposed PWM method is verified through experiments.