• JSTS:Journal of Semiconductor Technology and Science
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• v.1 no.4
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• pp.202-208
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• 2001

In Recent results suggested that doping $Ta_2O_5$ with a small amount of $TiO_2$ using standard ceramic processing techniques can increase the dielectric constant of $Ta_2O_5$ significantly. In this paper, this concept is studied using RTCVD (Rapid Thermal Chemical Vapor Deposition). Ti-doped $Ta_2O_5$ films are deposited using $TaC_{12}H_{30}O_5N$, $C_8H_{24}N_4Ti$, and $O_2$ on both Si and $NH_3$-nitrided Si substrates. An $NH_3$-based interface layer at the Si surface is used to prevent interfacial oxidation during the CVD process and post deposition annealing is performed in $H_2/O_2$ ambient to improve film quality and reduce leakage current. A sputtered TiN layer is used as a diffusion barrier between the Al gate electrode and the $TaTi_xO_y$ dielectric. XPS analyses confirm the formation of a ($Ta_2O_5)_{1-x}(TiO_2)_x$ composite oxide. A high quality $TaTi_xO_y$ gate stack with EOT (Equivalent Oxide Thickness) of $7{\AA}$ and leakage current $Jg=O.5A/textrm{cm}^2$ @ Vg=-1.0V has been achieved. We have also succeeded in forming a $TaTi_x/O_y$ composite oxide by rapid thermal oxidation of the as-deposited CVD TaTi films. The electrical properties and Jg-EOT characteristics of these composite oxides are remarkably similar to that of RTCVD $Ta_2O_5, suggesting that the dielectric constant of $Ta_2O_5$ is not affected by the addition of $TiO_2$.

• Korean Journal of Materials Research
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• v.7 no.11
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• pp.969-973
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• 1997

저유전율 층간절연물질인 불소첨가 SiO$_{2}$박막을 ECR(electron cyclotron resonance) Plasma chemical vapor deposition 법으로 성막하였다. SiOF박막의 증착은 SiF$_{4}$/O$_{2}$의 가스유량비를 변수로하여 0.2에서 1.6까지 변화시켜 증착하였고, 이때 마이크로파 전력은 700W, 기판온도는 30$0^{\circ}C$에서 행하였다. 증착된 SiOF박막의 흡습특성을 알아보기 위하여 Fourier transformed infrared spectroscopy(FTIR)을 이용하여 분석한 결과, 가스유량비 (SiF$_{4}$O$_{2}$)가 0.2 에서 1.6으로 증가하였을 때 Si-Ostretching피크의 위치는 1072$cm^{-1}$ /에서 1088$cm^{-1}$ /로 증가하였으며, Si-F$_{2}$피크는 가스유량비가 1.0이상에서 나타나기 시작하였다. 또한 가스유량비가 0.2에서 0.8까지 변화하여 증착한 시편은 Si-OH 피크가 관찰되지 않았지만 가스유량비가 1.0이상(11.8at.% F함유)의 시편의 경우 Si-OH 피크가 관찰되어 내흡습성이 저하되고 있음을 확인할 수 있었다.

• Proceedings of the Korean Vacuum Society Conference
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• 2012.08a
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• pp.247-247
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• 2012

Plasmon subwavelength nanostructures enable the structurally modulated color due to the resonance conditions for the specific wavelength range of light with the nanoscale hole arrays on a metal layer. While the unique properties offered from a single layer of metal may open up the potential applications of integrated devices to displays and sensors, fabrication requirements in nanoscale, typically on the order of or smaller than the wavelength of light in a corresponding medium can limit the cost-effective implementation of the plasmonic nanostructures. Simpler nanoscale replication technologies based on the soft lithography or roll-to-roll nanoimprinting can introduce economically feasible manufacturing process for these devices. Such replication requires an optimal design of a master template to produce a stamp that can be applied for a roll-to-roll nanoimprinting. In this paper, a master mold with subwavelength nanostructures is fabricated and optimized using focused ion beam for the applications to nanoimprinting process. Au thin film layer is deposited by sputtering on a glass that serves as a dielectric substrate. Focused ion beam milling (FIB, JEOL JIB-4601F) is used to fabricate surface plasmon subwavelength nanostructures made of periodic hole arrays. The light spectrum of the fabricated nanostructures is characterized by using UV-Vis-NIR spectrophotometer (Agilent, Cary 5000) and the surface morphology is measured by using atomic force microscope (AFM, Park System XE-100) and scanning electron microscope (SEM, JEOL JSM-7100F). Relationship between the parameters of the hole arrays and the corresponding spectral characteristics and their potential applications are also discussed.

• Electrical & Electronic Materials
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• v.16 no.9
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• pp.63.1-63
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• 2003

Catalytic chemical vapor deposition (Cat-CVD) has been developed to deposit alumina(Al$_2$O$_3$) thin films on silicon (Si) crystal using N$_2$ bubbled tir-methyl aluminium [Al(CH$_3$)$_3$, TMA] and molecular oxygen (O$_2$) as source species and tungsten wires as a catalyzer. The catalyzer dissociated TMA at approximately 600$^{\circ}C$ The maximum deposition rate was 18 nm/min at a catalyzer temperature of 1000 and substrate temperature of 800$^{\circ}C$. Metal oxide semiconductor (MOS) diodes were fabricated using gates composed of 32.5-nm-thick alumina film deposited as a substrate temperature of 400oC. The capacitance measurements resulted in a relatively dielectric constant of 7, 4, fixed charge density of 1.74*10e12/$\textrm{cm}^2$, small hysteresis voltage of 0.12V, and very few interface trapping charge. The leakage current was 5.01*10e-7 A/$\textrm{cm}^2$ at a gate bias of 1V.

• Journal of electromagnetic engineering and science
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• v.8 no.3
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• pp.129-133
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• 2008

An integrated passive device(IPD) technology by semi-insulating(SI)-GaAs-based fabrication has been developed to meet the ever increasing needs of size and cost reduction in wireless applications. This technology includes reliable NiCr thin film resistor, thick plated Cu/Au metal process to reduce resistive loss, high breakdown voltage metal-insulator-metal(MIM) capacitor due to a thinner dielectric thickness, lowest parasitic effect by multi air-bridged metal layers, air-bridges for inductor underpass and capacitor pick-up, and low chip cost by only 6 process layers. This paper presents the Wilkinson power divider with excellent performance for digital cellular system(DCS). The insertion loss of this power divider is - 0.43 dB and the port isolation greater than - 22 dB over the entire band. Return loss in input and output ports are - 23.4 dB and - 25.4 dB, respectively. The Wilkinson power divider based on SI-GaAs substrates is designed within die size of $1.42\;mm^2$.

• Proceedings of the Materials Research Society of Korea Conference
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• 2003.03a
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• pp.107-107
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• 2003

원자층 증착(ALD, Atomic Layer Deposition)기술은 기판 표면에서의 self-limiting reaction을 통해 매우 얇은 박막을 형성할 수 있고, 두께 및 조성 제어를 정확히 할 수 있으며, 복잡한 형상의 기판에서도 100%에 가까운 step coverage를 얻을 수 있어 초미세패턴의 형성과 매우 얇은 두께에서 균일한 물리적, 전기적 특성이 요구되는 초미세 반도체 공정에 적합하다. 특히 반도체의 logic 및 memory 소자의 gate 공정에서 절연막과 보호막으로, 그리고 배선공정에서는 층간절연막(ILD, Inter Layer Dielectric)으로 사용하는 silicon oxide 박막에 적용될 경우, LPCVD 방법에 비해 낮은 온도에서 증착이 가능해 boron과 같은 dopant들의 확산을 최소화하여 transistor 특성 향상이 가능하며, PECVD 방법에 비해 전기적·물리적 특성이 월등히 우수하고 대면적 uniformity 증가가 기대된다. 본 연구에서는 자체적으로 설계 및 제작한 장비를 이용하여 silicon oxide 박막을 ALD 방법으로 증착하고 그 특성을 살펴보았다. 먼저, cycle 수에 따른 증착 박막 두께의 linearity를 통해서 원자층 증착(ALD)임을 확인할 수 있었으며, reactant exposure(L)와 증착 온도에 따른 deposition rate 변화를 알아보았다 Elipsometer를 이용해 증착된 silicon oxide 박막의 두께 및 굴절률과 그 uniformity를 관찰하였고, AES 및 XPS 분석 장비로 박막의 조성비와 불순물 성분을 살펴보았으며, 증착 박막의 치밀성 평가를 위해 HF etchant로 wet etch rate를 측정하여 물리적 특성을 정리하였다. 특히, 기존의 박막 증착 방법인 LPCVD와 PECVD에 의한 silicon oxide박막의 물성과 비교, 평가해 보았다. 나아가 적절한 촉매 물질을 선정하여 원자층 증착(ALD) 공정에 적용하여 그 효과도 살펴보았다.

• Journal of the Korean Applied Science and Technology
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• v.22 no.3
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• pp.281-288
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• 2005

The silica nanoparticles were used as support of catalyst, filling material, electronic assembler, thin film material, and sensor material. And, the titania nanoparticles were used as pigment, dielectric substance, sensor and photocatalyst. In this paper, the spherical composite particles of $TiO_2/SiO_2$with narrow size distribution and phase pure were synthesized by ultrasonic spray pyrolysis method from $TiOSO_4$ and colloidal silica solution. Using ultrasonic apparatus, this starting solution was vaporized to droplets, and these droplets were induced into tube furnace by carrier gas. The resulting composite powder was characterized by scanning electron microscopy, X-ray diffraction analysis, TG-DTA, in vitro sun protection factor(SPF) and BET surface area analysis.

• Proceedings of the Korean Vacuum Society Conference
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• 2013.02a
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• pp.161-161
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• 2013

Two-dimensional electron gas (2DEG) has been investigated at the heterointerface between two insulating dielectric perovskite oxides, $LaAlO_3$ (LAO)/$SrTiO_3$ (STO). Properties of the 2DEG have attracted an enormous interest in condensed matter physics due to multifunctional properties such as the coexistence of ferromagnetism and superconductivity, as well as the high electron mobility. Here, we have grown $Ta_2O_5$ thin films using pulsed laser deposition on $SrTiO_3$ substrate to investigate the electric properties of the $Ta_2O_5$/STO heterointerface. Our research reveal that the non-polar $Ta_2O_5$/$TiO_2$ heterointerface favors the formation of 2DEG similar to that at the LAO/STO heterointerface. The metallic behavior was found in this heterointerface with the current about $10{\sim}100{\mu}A$ at 5 V by using conventional I-V measurements, when the $Ta_20_5$ film thickness reaches over critical thickness, $d_c{\simeq}2uc$. The finding that electrons was localized at $Ta_2O_5$/STO heterointerface have attracted to be strong and new candidate for nanoscale oxide device applications.

• Proceedings of the KIEE Conference
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• 2008.05a
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• pp.169-170
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• 2008

The heterolayered PZT/PT thick films were fabricated by two different methods - thick films of the PZT by screen printing method on alumina substrates electrodes with Pt, thin films of $PbTiO_3$ by the spin coating method on the PZT thick films and once more thick films of the PZT by the screen printing method on the $BaTiO_3$ layer The structural and the dielectric properties were investigated for effect of various stacking sequence of sol-gel prepared $PbTiO_3$ coating solution at interface of the PZT thick films. The insertion of $PbTiO_3$ interlayer yielded the PZT thick films with homogeneous and dense grain structure with the number of $PbTiO_3$ layers. The leakage current density of the PZT/$PbTiO_3-1$ film is less that $4.41{\times}10^{-9}\;A/cm^2$ at 5 V.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2001.07a
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• pp.70-73
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• 2001

MFIS(Metal-ferroelectric-insulator- semiconductor) structures using silicon oxynitride(SiON) buffer layers were fabricatied and demonstrated nonvolatile memory operations. Oxynitride(SiON) films have been formed on p-Si(100) by RTP(rapid thermal process) in O$_2$+N$_2$ ambient at 1100$^{\circ}C$. The gate leakage current density of Al/SiON/Si(100) capacitor was about the order of 10$\^$-8/ A/cm$^2$ at the range of ${\pm}$ 2.5 MV/cm. The C-V characteristics of Al/LiNbO$_3$/SiON/Si(100) capacitor showed a hysteresis loop due to the ferroelectric nature of the LiNbO$_3$ thin films. Typical dielectric constant value of LiNbO$_3$ film of MFIS device was about 24. The memory window width was about 1.2V at the electric field of ${\pm}$300 kV/cm ranges.