• 한국재료학회지
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• 제20권5호
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• pp.241-245
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• 2010

One of the weak points of the Cr-doped SZO is that until now, it has only been fabricated on perovskite substrates, whereas NiO-ReRAM devices have already been deposited on Si substrates. The fabrication of RAM devices on Si substrates is important for commercialization because conventional electronics are based mainly on silicon materials. Cr-doped ReRAM will find a wide range of applications in embedded systems or conventional memory device manufacturing processes if it can be fabricated on Si substrates. For application of the commercial memory device, Cr-doped $SrZrO_3$ perovskite thin films were deposited on a $SrRuO_3$ bottom electrode/Si(100)substrate using pulsed laser deposition. XRD peaks corresponding to the (112), (004) and (132) planes of both the SZO and SRO were observed with the highest intensity along the (112) direction. The positions of the SZO grains matched those of the SRO grains. A well-controlled interface between the $SrZrO_3$:Cr perovskite and the $SrRuO_3$ bottom electrode were fabricated, so that good resistive switching behavior was observed with an on/off ratio higher than $10^2$. A pulse test showed the switching behavior of the Pt/$SrZrO_3:Cr/SrRuO^3$ device under a pulse of 10 kHz for $10^4$ cycles. The resistive switching memory devices made of the Cr-doped $SrZrO_3$ thin films deposited on Si substrates are expected to be more compatible with conventional Si-based electronics.

• 한국광학회지
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• 제28권1호
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• pp.9-15
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• 2017

실리콘 기판으로 만든 바이오센서에서 펩타이드-항체의 접합 동특성을 회전 타원분광계로 정밀하게 측정하고 분석하였다. 극도로 낮은 몰농도의 펩타이드를 측정할 때, 시료가 놓이는 바이오센서의 표면의 불완전한 편평도와 완충용액 굴절률 변화로 인한 측정오차를 줄이기 위하여 금속박막의 유리 프리즘 대신에 실리콘 기판 위에 덱스트란 SAM을 직접 적층하여 바이오센서를 만들었다. $100{\mu}l/min$의 완충용액 주입속도에서 바이오센서에 올려진 항체 및 펩타이드의 접합특성을 각각 측정하였다. 리터당 5 ng의 낮은 항체농도에서도 항체-덱스트란 SAM 사이의 동특성을 쉽게 측정할 수 있었다. 또한 100 nM까지의 펩타이드에 대한 미세한 흡착 및 해리 특성을 정밀하게 측정할 수 있었으며, 접합 동특성 식에 이 실험결과를 피팅하여 흡착계수와 해리계수를 구할 수 있었다. 이 결과로부터 펩타이드의 평형상태의 해리상수인 $K_D$는 97 nM이었고, 이 수치는 Class I에 속함을 알 수 있었다.

• 대한전자공학회논문지SD
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• 제44권5호
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• pp.8-14
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• 2007

본 논문에서는 MOS 소자의 게이트 유전체로 사용될 고유전 박막으로 $HfO_2$/Hf 박막을 제조하여 그 전기적 특성을 관찰하였다. $HfO_2$박막은 TEMAH와 $O_3$ 전구체를 사용한 ALD 방법으로 p-type (100) 실리콘 웨이퍼 위에 증착하였다. $HfO_2$막을 증착시키기 전에 중간층으로써 Hf 금속 층을 증착하였다. Round-type의 MOS 커패시터 제작을 위해, 상부 전극은 Al 또는 Pt을 이용하여 약 2000 ${\AA}$ 두께의 전극을 형성하였다. $HfO_2$ 박막은 화학정량적 특성을 보였으며, $HfO_2$/Si 계면에서 Si-O 결합 대신 Hf-Si 결합과 Hf-Si-O 결합이 관찰되었다. $HfO_2$와 Si 사이의 Hf 중간층은 $SiO_x$의 성장이 억제되었고, $HfSi_xO_y$으로 변형되었다. 이러한 결과로 $HfO_2$/Hf/Si 구조에서 Hf 중간층이 있음으로 게이트 유전체의 고유전율이 유지되면서 계면 특성이 개선됨을 확인하였다.

• 한국전산구조공학회논문집
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• 제32권2호
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• pp.103-108
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• 2019

본 논문에서는 비평형 분자동역학 시뮬레이션 기법을 사용하여 알루미늄 박막과 실리콘 웨이퍼 간 열경계저항을 예측하였다. 실리콘의 끝 단 고온부에 열을 공급하고, 같은 양의 열을 알루미늄 끝 단 저온부에서 제거하여 경계면을 통한 열전달이 일어나도록 하였으며, 실리콘 내부와 알루미늄 내부의 선형 온도 변화를 계산함으로써 경계면에서의 온도 차이에 따른 열저항 값을 구하였다. 300K 온도에서 $5.13{\pm}0.17m^2{\cdot}K/GW$의 결과를 얻었으며, 이는 열유속 조건의 변화와 무관함을 확인하였다. 아울러, 펨토초 레이저 기반의 시간영역 열반사율 기법을 사용하여 열경계저항 값을 실험적으로 구하였으며, 시뮬레이션 결과와 비교 검증하였다. 전자빔 증착기를 사용하여 90nm 두께의 알루미늄 박막을 실리콘(100) 웨이퍼 표면에 증착하였으며, 유한차분법을 이용한 수치해석을 통해 열전도 방정식의 해를 구해 실험결과와 곡선맞춤 함으로써 열경계저항을 정량적으로 평가하고 나노스케일에서의 열전달 현상에 관한 특징을 살펴보았다.

• 한국광학회지
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• 제34권6호
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• pp.241-247
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• 2023

본 연구에서는 355 nm 파장의 나노초 레이저를 비정질 실리콘 박막에 조사하여 형성된 주기적 laser-induced periodic surface structure (LIPSS) 구조의 분광학적 특성을 연구하였다. 지름 196 ㎛의 가우시안 빔을 단위면적당 레이저 펄스 190-280회, 레이저 빔의 세기는 100-130 mJ/cm² 범위에서 'ㄹ' 자 형태로 2차원 스캔하였다. 그 결과 Si 박막 표면에 ~300 nm 주기의 LIPSS 구조가 레이저 편광에 수직 방향으로 정렬되었다. 시료의 투과율 스펙트럼을 측정하여 transverse-electric 편광과 transverse-magnetic 편광에 대해서 각각 700 nm, 500 nm 근방에서 dip이 관측되었다. 이 현상을 설명하기 위해 1차원 격자구조 모델을 이용하여 rigorous coupled-wave analysis를 이용한 시뮬레이션을 하여 편광에 따른 도파모드 공진에 의한 특성임을 규명하였다.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2008년도 하계학술대회 논문집 Vol.9
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• pp.174-174
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• 2008

Non-volatile memories using ferroelectric-gate field-effect transistors (Fe-FETs) with a metal/ferroelectric/semiconductor gate stack (MFS-FETs) make non-destructive read operation possible. In addition, they also have features such as high switching speed, non-volatility, radiation tolerance, and high density. However, the interface reaction between ferroelectric materials and Si substrates, i.e. generation of mobile ions and short retention, make it difficult to obtain a good ferroelectric/Si interface in an MFS-FET's gate. To overcome these difficulties, Fe-FETs with a metal/ferroelectric/insulator/semiconductor gate stack (MFIS-FETs) have been proposed, where insulator as a buffer layer is inserted between ferroelectric materials and Si substrates. We prepared $SrBi_2Ta_2O_9$ (SBT) film as a ferroelectric layer and $LaZrO_x$ (LZO) film as a buffer layer on p-type (100) silicon wafer for making the MFIS-FET devices. For definition of source and drain region, phosphosilicate glass (PSG) thin film was used as a doping source of phosphorus (P). Ultimately, the n-channel ferroelectric-gate FET using the SBT/LZO/Si Structure is fabricated. To examine the ferroelectric effect of the fabricated Fe-FETs, drain current ($I_d$) versus gate voltage ($V_g$) characteristics in logarithmic scale was measured. Also, drain current ($I_d$) versus drain voltage ($V_d$) characteristics of the fabricated SBT/LZO/Si MFIS-FETs was measured according to the gate voltage variation.

• 한국전기전자재료학회논문지
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• 제11권1호
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• pp.33-40
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• 1998

The composite SiO$_2$/Si$_3$N$_4$/SiO$_2$(ONO) film formed by oxidation on nitride film has been widely studied as DRAM stacked capacitor multi-dielectric films. Load lock(L/L) LPCVD system by HF cleaning is used to improve electrical capacitance and to scale down of effective thickness for memory device, but is brings a new problem. Nitride film deposited using HF cleaning shows selective deposition on poly silicon and oxide regions of capacitor. This problem is avoidable by carpeting chemical oxide using $H_2O$$_2$cleaning before nitride deposition. In this paper, we study the limit of nitride thickness for abnormal oxidation and the initial deposition time for nitride deposition dependent on underlayer materials. We proposed an advanced fabrication process for stacked capacitor in order to avoid selective deposition problem and show the usefulness of nitride deposition using L/L LPCVD system by $H_2O$$_2$cleaning. The natural oxide thickness on polysilicon monitor after HF and $H_2O$$_2$cleaning are measured 3~4$\AA$, respectively. Two substrate materials have the different initial nitride deposition times. The initial deposition time for polysilicon is nearly zero, but initial deposition time for oxide is about 60seconds. However the deposition rate is constant after initial deposition time. The limit of nitride thickness for abnormal oxidation under the HF and $H_2O$$_2$cleaning method are 60$\AA$, 48$\AA$, respectively. The results obtained in this study are useful for developing ultra thin nitride fabrication of ONO scaling and for avoiding abnormal oxidation in stacked capacitor application.

• 대한전기학회:학술대회논문집
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• 대한전기학회 1993년도 하계학술대회 논문집 B
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• pp.1295-1297
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• 1993

Properties of oxynitride films oxidized by $N_2O$ gas after thermal oxidation and $N_2O$ oxide films directly oxidized using $N_2O$ gas on the bare silicon wafer have been studied. Through the AES analysis, Nitrogen pile-up at the interface of Si/oxynitride and Si/$N_2O$ oxide has observed. Also, it could be presumed that there are differences in the mechanism of the growth of film by observing film growth. $N_2O$ oxide and oxynitride films have the self-limited characteristics. Therefore, it will be possible to obtain ultra-thin films. Nitrogen pile-up at the interfaces Si/oxynitride and Si/$N_2O$ oxide strengthens film structure and improves dielectric reliability. Although fixed charge densities and interface trap densities of $N_2O$ oxide and oxynitride films has somewhat higher than those of thermal $SiO_2,\;N_2O$ oxide and oxynitride films showed improved I-V characteristics and constant current stress.

• 한국표면공학회지
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• 제40권4호
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• pp.190-196
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• 2007

Dye sensitized solar cells(DSSC) are the most promising future energy resource due to their high energy efficiency, low production cost, and simple manufacturing process. But one problem in DSSC is short life time compared to silicon solar cells. This problem occurred from photocatalytic degradation of dye material by nanometer sized $TiO_2$ particles. To prevent dye degradation as well as to increase its life time, the transparent coating film is needed for UV blocking. In this study, we synthesized nanometer sized $TiO_2$ particles in sols by increasing its internal pressure up to 200 bar in autoclave at $120^{\circ}C$ for 10 hrs. The synthesized $TiO_2$ sols were all formed with brookite phase and their particle size was several nm to 30 nm. Synthesized $TiO_2$ sols were coated on the backside of fluorine doped tin oxide(FTO) glass by ink jet printing method. With increasing coating thickness by repeated ink jet coating, the absorbance of UV region (under 400 nm) also increases reasonably. Decomposition test of titania powders dispersed in 0.1 mM amaranth solution covered with $TiO_2$ coating glass shows more stable dye properties under UV irradiation, compared to that with as-received FTO glass.

• 신재생에너지
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• 제18권1호
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• pp.29-34
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• 2022

The most prevalent cause of solar cell efficiency loss is reduced recombination at the metal electrode and silicon junction. To boost efficiency, a a SiO_X/poly-Si passivating interface is being developed. Poly-Si for passivating contact is formed by various deposition methods (sputtering, PECVD, LPCVD, HWCVD) where the ploy-Si characterization depends on the deposition method. The sputtering process forms a dense Si film at a low deposition rate of 2.6 nm/min and develops a low passivation characteristic of 690 mV. The PECVD process offers a deposition rate of 28 nm/min with satisfactory passivation characteristics. The LPCVD process is the slowest with a deposition rate of 1.4 nm/min, and can prevent blistering if deposited at high temperatures. The HWCVD process has the fastest deposition rate at 150 nm/min with excellent passivation characteristics. However, the uniformity of the deposited film decreases as the area increases. Also, the best passivation characteristics are obtained at high doping. Thus, it is necessary to optimize the doping process depending on the deposition method.