• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 1993.05a
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• pp.137-141
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• 1993

We studied the fabrication and electrical characteristics of high voltage hydrogenerated amorphous silicon thin film transistor using glow discharge plasma enchanced chemical vapor deposition (GDPECVD) with $2500{\AA}\;SiO_2$, $400-1500{\AA}$ a-Si thickness, 350V output voltage, 100V input voltaege, and $9.55{\times}10^4$ average on/off ratio. We found that leakage current of high voltage TFT occured 0-70V drain voltage.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2010.06a
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• pp.6-6
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• 2010

This paper describes that single crystal cubic silicon (3C-SiC) films have been deposited on carbonized Si(100) substrate using hexamethyldisilane(HMDS, $Si_2(CH_3)_6$) as a safe organosilane single-source precursor and a nonflammable mixture of Ar and $H_2$ gas as the carrier gas by APCVD at $1280^{\circ}C$. The 3C-SiC film had a very good crystal quality without defects due to viods, a very low residual stress.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2010.06a
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• pp.232-232
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• 2010

Simulation Program (AFORS-HET 2.4.1) was used, include the basic structure of crystalline silicon thin film as above, under the intrinsic a-Si:H films bonded symmetrical structure (Symmetrical structure) were used. The structure of ITO, a-Si p-type, intrinsic a-Si, c-Si, intrinsic a-Si, a-Si n-type, metal (Al) layer has one of the seven. When thickness for each layer was given the change, the changes of a-Si p-type layer and the intrinsic a-Si layer on top had an impact on efficiency. Efficiency ratio of p-type a-Si:H layer thickness was sensitive to, especially a-Si: H layer thickness is increased in a rapid decrease in Jsc and FF, and efficiency was also decreased.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2010.06a
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• pp.356-356
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• 2010

In this paper, Poly silicon thin-film transistors (poly-Si TFTs) with employed the SPC (Solid phase crystallization) and ELA (Excimer laser annealing) methods on glass panel substrate are fabricated to investigate the electrical poperies. Poly-Si TFTs have recess-channel structure with formated source/drain regions by LPCVD n+ poly Si in low $650^{\circ}C$ temperature. the ELA-TFT show higher on/off current ratio and subthreshold swing than a-Si and SPC TFT that therefore, these results showed that the ELA-TFT might be beneficial for practical embedded TFT memory device application.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2010.06a
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• pp.366-366
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• 2010

Simulation Program (AFORS-HET 2.4.1) was used, include the basic structure of crystalline silicon thin film as above, below Intrinsic a-Si:H films bonded symmetrical structure (Symmetrical structure) were used. Efficiency with variation of the concentration was grown by the a-Si p-type with increasing concentrations of Na, efficiency with increasing a-Si n-type of Nd Concentrations was not changed, was decreased rapidly when concentrations were decreased. Efficiency was increased when c-Si n-type of Nd concentration was increased, otherwise efficiency was decreased when concentration was decreased.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.25 no.9
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• pp.677-680
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• 2012

The dependency of annealing temperature on the electrical performances in amorphous silicon-zinc-tin-oxide thin film transistors (SZTO-TFT) has been investigated. The SZTO channel layers were prepared by using radio frequency (RF) magnetron sputtering method with different annealing treatment. The field effect mobility (${\mu}_{FE}$) increased and threshold voltage ($V_{th}$) shifted to negative direction with increasing annealing temperature. As a result, oxygen vacancies generated in SZTO channel layer with increasing annealing temperature resulted in negative shift in $V_{th}$ and increase in on-current.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2008.11a
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• pp.437-438
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• 2008

박막태양전지에서 p-layer, i-layer, n-layer의 thickness와 doping concentration은 가장 기본이 되는 요소이다. 각 layer에서 위 두 가지 요소를 ASA simulator를 이용해서 높은 효율을 갖는 박막태양전지를 설계하기 위해 조절하였다. Simulation결과 p-layer의 thickness는 $9.5*10^{-9}m$, doping concentration은 0.2eV, i-layer의 thickness는 $4.535*10^{-7}m$, n-layer의 thickness는 $2*10^{-8}m$, doping concentration 은 0.1eV에서 최종 11.48%의 효율을 얻을 수 있었다. 본 연구를 통하여 높은 효율의 박막태양전지 설계 시에 도움이 될 수 있을 것이다.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2008.11a
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• pp.302-303
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• 2008

Nominally undoped (intrinsic) ZnO thin films were deposited by magnetron sputtering system with utilization of substrate bias on silicon at $450^{\circ}C$. Oxygen gas was selected as sputtering gas. The deposited thins were evaluated with X-ray diffraction (XRD) for their microstructure analysis and Hall effect in Van der Pauw configuration for their electrical property. The XRD shows that the magnitude and polarity of substrate bias significantly influence the microstructure and electrical properties.

• ETRI Journal
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• v.34 no.4
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• pp.633-636
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• 2012

A dynamic analysis of an amorphous silicon (a-Si) thin film transistor liquid crystal display (TFT-LCD) pixel is presented using new a-Si TFT and liquid crystal (LC) capacitance models for a Simulation Program with Integrated Circuit Emphasis (SPICE) simulator. This dynamic analysis will be useful when predicting the performance of LCDs. The a-Si TFT model is developed to accurately estimate a-Si TFT characteristics of a bias-dependent gate to source and gate to drain capacitance. Moreover, the LC capacitance model is developed using a simplified diode circuit model. It is possible to accurately predict TFT-LCD characteristics such as flicker phenomena when implementing the proposed simulation model.

• Journal of the Semiconductor & Display Technology
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• v.2 no.2
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• pp.1-4
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• 2003

We have developed a rotating compensator spectroscopic ellipsometer (RCSE). As the ellipsometry measures a change in the polarization state of a light wave upon non-normal reflection from surface, the degree of sensitivity is enhanced greatly through the detection of relative phase change. RCSE acquires additional information from the non-ideal surface of sample and operates over the photon energy range from 1.5 to 4.5 eV. We applied RCSE to measure the optical properties of films and the line-width of patterned PR films on crystalline silicon.