• Journal of the Korean Society of Industry Convergence
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• v.20 no.2
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• pp.187-194
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• 2017

This study examined the validity and reliability of the thermal safety design, in order to maintain the heat generated from integrated circuit (IC) chips in the converter, condenser, resistor, and transistor (which are considered as heat sources for thermoelectric devices with a printed circuit board) below target levels during the process of developing a control board and a main power board. The study analyzed the heat generation and dissipation characteristics of the entire printed circuit board (PCB) model to examine its thermal safety.

• Computers and Concrete
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• v.8 no.4
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• pp.425-443
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• 2011

Most previous studies have generally overlooked the contribution of thermal stresses generated within the concrete mass when subjected to microwave heating and reported on pore-pressure as being the dominant cause of surface spalling. Also, the variation in electromagnetic properties of concrete and its effects on the microwave heating process have not been studied in detail. In this paper, finite element modeling is used to examine the simultaneous development of compressive thermal stresses and pore-pressure arising from the microwave heating of concrete. A modified Lambert's Law formulation is proposed to estimate the microwave power dissipation in the concrete mass. Moreover, the effects of frequency and concrete water content on the concrete heating rate and pattern are investigated. Results show high compressive stresses being generated especially in concrete with a high water content when heated by microwaves of higher frequencies. The results also reveal that the water content of concrete plays a crucial role in the microwave heating process.

• Journal of the Korean Society of Manufacturing Process Engineers
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• v.18 no.4
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• pp.41-47
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• 2019

The advent of highly integrated, high-power electronics requires low a coefficient of thermal expansion performance to prevent delamination between the heat dissipation material and substrate. This paper reports a preliminary study on the manufacturing technology of gas reaction control composite material, focusing on the prediction of the thermal expansion coefficients of Al-AlN composite materials. We obtained numerical equivalent property values by using finite element analysis and compared the values with theoretical formulas. Al-AlN should become the optimal composite material when the proportion of the reinforcing phase is approximately 0.45.

• 한국전산유체공학회:학술대회논문집
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• 2010.05a
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• pp.416-421
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• 2010

The north and south panel of a geostationary satellite are used for radiator panels to reject internal heat dissipation of electronics units and utilize several heat pipe networks to control the temperatures of units and the satellite within proper ranges. The design of these panels is very important and essential at the conceptual design and preliminary design stage so several thousands of nodes of more are utilized in order to perform thermal analysis of panel. Generating a large number of nodes(meshes) of the panel takes time and is tedious work because the mesh can be easily changed and updated by locations of units and heat pipes. Also the detailed panel model can not be integrated into spacecraft thermal model due to its node size and limitation of commercial satellite thermal analysis program. Thus development of a program was required in order to generate detailed panel model, to perform thermal analysis and to make a reduced panel model for the integration to the satellite thermal model. This paper describes the development and the verification of panel thermal analysis program with ist main modules and its main functions.

• Journal of the Korean Society for Aeronautical & Space Sciences
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• v.32 no.9
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• pp.114-121
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• 2004

Thermal design changes and analysis on the engineering model of Command Telemetry Unit(CTU) for a geostationary communications satellite arc performed for the purpose of developing an engineering qualification model. A thermal model is developed by using power consumption measurement values of each functional board and thermal cycling test results. In modeling heat dissipated EEE parts, heat dissipation is imposed evenly on the EEE part footprint area which is projected to the printed circuit board. All the EEE parts of CTU meet the requirement of their allowable temperature range when placed on the engineering qualification level of thermal vacuum environments in accordance with the proposed thermal design changes.

• Journal of Advanced Marine Engineering and Technology
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• v.40 no.8
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• pp.686-691
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• 2016

This paper employs numerical tools to obtain an optimal thermal design of a heat exchanger with plain-fins. This heat exchanger is located at the condensing section of a crevice-type heat pipe. The plain-fins in the heat exchanger are radically mounted to two tubes in the condensing section. To obtain the optimal design parameters, a computational fluid dynamics technique is introduced and applied to different placement configurations in a system module. Owing to its effects on the heat pipe performance, the temperature difference between the tube surfaces and ambient air is investigated in detail. A greater heat dissipation rate occurs when the plain-fin offsets change from 2 to 3 mm. When this temperature difference is ${\Delta}T=70^{\circ}C$, the upper part of the plain-fins undergoes an accumulation of heat. At below $70^{\circ}C$, the dissipation of heat is accepted. A rectangular plain-fin geometry with varying widths and heights does not have a significant impact on the heat dissipation through-out the overall system. In addition, the temperature distributions between different plain-fin pitches show an equal profile even with different fin pitches.

• Journal of the Microelectronics and Packaging Society
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• v.20 no.3
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• pp.75-80
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• 2013

According to advance of electronic packaging technology, electronic package becomes smaller. Miniaturization of package causes the temperature rise of package. This can degrade life of electronic device and generate the failure of electronic system. In this study, we proposed a new semi-embedded structure with micro pattern for maximizing heat dissipation. A proposed structure showed the characteristics which have maximum temperature lower than $20^{\circ}C$ compared with conventional structure. And also, in view of thermal stress and strain, our structure showed a remarkably low value compared with other ones. We expect that the new structure proposed in this work can be applied to an flip-chip package of the future.

• Journal of the Korea Institute of Military Science and Technology
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• v.22 no.2
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• pp.249-254
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• 2019

A Digital Transmitter/Receiver Module(DTRM), which is an essential part in active phased-array radar systems, generates a high heat density, and needs to be properly cooled for stable operation. A tile-type DTRM that is a stacking structure of multi-layer components was modeled with simplification and heat dissipation characteristics of the DTRM model were studied using computational fluid dynamics(CFD) simulations. Most of the heat was dissipated by the heat conduction through the cold plate, but the heat transfer by the forced convection on top of the DTRM also was found to play an important role in the thermal management. Under the given conjugated heat transfer environment, the DTRM was confirmed to secure a stable operating temperature range.

• Nuclear Engineering and Technology
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• v.55 no.11
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• pp.4173-4180
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• 2023

The stability of engineered barriers in high-level radioactive waste disposal systems can be influenced by the decay heat generated by the waste. This study focuses on the thermal analysis of various canister designs to effectively lower the maximum temperature of the engineered barrier. A numerical model was developed and employed to investigate the heat dissipation potential of copper rings placed across the buffer. Various canister designs incorporating copper rings were presented, and numerical analysis was performed to identify the design with the most significant temperature reduction effect. The results confirmed that the temperature of the buffer material was effectively lowered with an increase in the number of copper rings penetrating the buffer. Parametric studies were also conducted to analyze the impact of technical gaps, copper thickness, and collar height on the temperature reduction. The numerical model revealed that the presence of gaps between the components of the engineered barrier significantly increased the buffer temperature. Furthermore, the reduction in buffer temperature varied depending on the location of the gap and collar. The methods proposed in this study for reducing the buffer temperature hold promise for contributing to cost reduction in radioactive waste disposal.

• Proceedings of the International Microelectronics And Packaging Society Conference
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• 2001.09a
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• pp.121-145
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• 2001

Chip Size Packages (CSP) are now widely used in high speed DRAM. The major driving farce of CSP development is its superior electrical performance than that of conventional package. However, the power dissipation of high speed DRAM like DDR or RAMBUS DRAM chip reaches up to near 2W. This fact makes the thermal management methods in DRAM package be more carefully considered. In this study, the thermal performances of 3 type CSPs named $\mu-BGA$^{TM}$$ $UltraCSP^{TM}$ and OmegaCSP$^{TM}$ were measured under the JEDEC specifications and their thermal characteristics were of a simulation model utilizing CFD and FEM code. The results show that there is a good agreement between the simulation and measurement within Max. 10% of $\circledM_{ja}$. And they show the wafer level CSPs have a superior thermal performance than that of $\mu-BGA.$ Especially the analysis results show that the thermal performance of wafer level CSPs are excellent fur modulo level in real operational mode without any heat sink.