• Journal of Positioning, Navigation, and Timing
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• v.4 no.1
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• pp.17-23
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• 2015

With the increase in the risk of GPS jamming, the development and application of anti-jamming GPS techniques have been actively performed. As the objective performance verification of developed techniques is important, equipment development for verification and discussion on anti-jamming performance test method and procedure have also been conducted. However, most tests are related to the specification of equipment and therefore detailed procedure of the performance verification of an anti-jamming system needs to be developed. In this study, requirements for anti-jamming performance verification were described, and test configurations and performance evaluation items depending on three kinds of test methods (lab test, basic outdoor test, and chamber test) were suggested for anti-jamming performance verification.

• Structural Engineering and Mechanics
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• v.65 no.2
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• pp.203-211
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• 2018

This paper introduces the development process of NCC(New Concrete Cutting) system and analyzes first verification test. Based on the first verification test results, some problems of NCC system have been newly modified. We carry out the second verification test. We tried to verify cutting performance and dust control efficiency of NCC system through the cutting test of concrete bridge piers. In particular, this verification test strives to solve the problem of concrete dust, which is the biggest problem of dry cutting method. The remaining dust problems in cutting section tried to solve through this verification test. This verification test of the NCC system shows that the dust problem of dry cutting method is closely controlled and solved. In conclusion, the proposed NCC method is superior to the dry cutting method in all aspects, including cutting performance, dust vacuum efficiency and cooling effect. The proposed NCC system is believed to be able to provide eco-friendly cutting technology to various industries, such as the removal of the SOC structures and the dismantling of nuclear plants, which have recently become a hot issue in the field of concrete cutting.

• Proceedings of the KIEE Conference
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• summer
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• pp.842-844
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• 2004

The Back Up Breaker and Making Switch are very important equipments for the short circuit test facility, and contacts are the most important parts of the above switches. There are very many kind of contacts according to switches characteristic and should be done the verification test before use, especially development contacts. This study describes the class of switches, arc chute, material of whole contacts and essential test for verification. The essential test for verification are dielectric test, mechanical operation test, short-time withstand current test, load current breaking test, and short-circuit making current test etc.

• Journal of Institute of Control, Robotics and Systems
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• v.14 no.8
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• pp.824-836
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• 2008

Relaxed static stability(RSS) concept has been applied to improve aerodynamic performance of modern version supersonic jet fighter aircraft. Therefore, flight control systems are necessary to stabilize an unstable aircraft, and provides adequate handling qualities and achieve performance enhancements. Standard FCSDVP (Flight Control System Design and Verification Process) is provided to reduce development period of the flight control system. In addition, if this process is employed in developing flight control system, it reduces the trial and error for development and verification of flight control system. This paper addresses the flight control system design and verification process for the RSS aircraft utilizing design goal based on military specifications, linear and nonlinear system design and verification based on universal software, handling quality test based on HILS(Hardware In-the-Loop Simulator) environment, and ground and flight test results to verify aircraft dynamic flight responses.

• Aerospace Engineering and Technology
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• v.11 no.1
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• pp.158-168
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• 2012

This paper deals with TVC nozzle stroke verification test and corresponding analysis techniques related to kick motor TVC system of KSLV-I second stage. It is shown that the relationship between TVC stroke and potentiometer voltage is revealed via the open-loop stroke verification test, and other major operational parameters including nozzle alignment error, actuation error, neutral position, radius of nozzle rotation, location of nozzle rotation center, angle conversion coefficients, etc. are analyzed via the closed-loop stroke verification test. The TVC stroke verification test results for the first and second flight model of KSLV-I show that all TVC operational parameters of KSLV-I second stage were normally setup for the first and second flight tests.

• Journal of Advanced Navigation Technology
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• v.27 no.6
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• pp.782-787
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• 2023

Korea augmentation satellite system (KASS) integration, verification, qualification (IVQ) activity is verification of requirements for KASS system and its sub-system that were performed based on the inspection, analysis, review of design, test (IART) method from factory acceptance test (FAT) to test readiness review (TRR) after critical design review (CDR) was closed. In the FAT phase, developed equipment was installed on the test platform and we were verified interfaces between sub-systems and coupling test with the kass control station (KCS). In the site aceeptance test (SAT) phase, on-site verification was conducted by installing equipment verified by FAT such as kass reference station (KRS), kass processing station (KPS), kass uplink station (KUS), KCS. However, considering the developed plan and status, SAT was divided into 3 phases and coupling test was performed. In the TRR phase, the KASS system verification was performed through FAT's test list and additional test list using the satellite based augmentation system (SBAS) broadcast signal from geostationary earth orbit (GEO) 1.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.43 no.7 s.349
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• pp.38-49
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• 2006

In this paper, a novel concept based on embedded processor and reconfigurable logic is proposed for efficient manufacturing test and design verification. Unlike traditional gap between design verification and manufacturing test, proposed concept is to combine both design verification and manufacturing test. The semiconductor chip which is using the proposed concept is named "SwToC" and SwToC stands for System with Test On a Chip. SwToC has two main features. First, it has functional verification function on a chip and this function could be made by using embedded processor, reconfigurable logic and memory. Second, it has internal ATE on a chip and this feature also could be made by the same architecture. To evaluate the proposed SwToC, we have implemented SwToC using commercial FPGA device with embedded processor. Experimental results showed that the proposed chip is possible for real application and could have faster verification time than traditional simulation method. Moreover, test could be done using low cost ATE.

• ETRI Journal
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• v.11 no.4
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• pp.22-36
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• 1989

In this paper, a design and implementation of an efficient protocol verification system named LOVE has been described. The LOVE has been developed specifically for LOTOS. It performs not only protocol syntax validation (PSV) but also protocol functional verification(PFV). The PSV is a test to check if a protocol is free from protocol syntax errors such as deadlocks and livelocks. The PFV confirms whether or not a protocol achieves its functional objectives. For the PSV, the reachability analysis is employed, and the observational equivalence test is used for the PFV. For protocol verification using the LOVE, a schematic protocol verification methodology has been outlined.

• Journal of the Korean Society for Railway
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• v.7 no.2
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• pp.114-119
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• 2004

According to the computerization of railway signalling systems. the communication protocol for interface between these systems are required. Therefore the new communication protocol for railway signaling system is required. Generally, there are two verification method for new designed protocol in the industrial and academic fields. One is the laboratory testing method which is very popular and general technique. In our research the comparison between existing and new designed protocol for signaling is described and the verification test results are also represented. From these laboratory test, we are verified the conformance of new designed protocol. Another method is verified by formal method. The format verification method is widely used at safety-critical system design but this approach is nor popular at verification communication protocol. However it is very important to verify the safety of new designed protocol for railway signaling system because signaling systems are very safety-critical systems. So, the methodology for formal verification of designed protocol is also reviews in this paper.

• Journal of the Semiconductor & Display Technology
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• v.23 no.1
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• pp.25-35
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• 2024

In the present modern day, as the complexity and size of SoC(System on Chip) increase, the importance of design verification are increasing, Therefore it takes a lot of time to verify the design. There is an emerging need to manage the verification environment faster and more efficiently by reusing the existing verification environment. UVM-based verification is a standardized and highly reliable verification method widely adopted and used in the semiconductor industry. This paper presents a UVM-based verification for the 4 tap equalizer module with a systolic array structure. Through the constraints randomization, it was confirmed that various test scenarios stimulus were generated. In addition, by verifying a simulation comparing the actual DUT outputs with the MATLAB reference outputs, the reuse and efficiency of the UVM test bench could be confirmed.