• Proceedings of the IEEK Conference
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• 2000.06b
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• pp.234-237
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• 2000

In this paper, a method to implement new Quasi-SOI LDMOSFET is introduced and the electrical characteristics of the device are studied. Key process steps of the device are explained briefly. By performing process and device simulations, electrical characteristics of the device are investigated, with emphasis on the optimization of the tilt angle of p$\^$0/ channel region. The electrical properties of the Quasi-SOI device are compared with those of bulk and SOI devices with the same process parameters. Simulated device characteristics are threshold voltage, off-state leakage current, subthreshold swing, DIBL, output resistance, lattice temperature, I$\_$D/-V$\_$Ds/, and cut-off frequency.

• Korean Journal of Air-Conditioning and Refrigeration Engineering
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• v.23 no.4
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• pp.281-286
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• 2011

The objective of this study is to optimize the four-bed six-step pressure swing adsorption(PSA) process for high purity $CH_4$ recovery from the biogas. The effects of P/F(purge to feed) ratio and cycle time on the process performance were evaluated. The cyclic steady-states of PSA process were reached after 12 cycles. The purity and recovery rate of product gas, pressure and temperature changes were constant as the cycle repeated. It was shown that the P/F ratio gave significant effect on the product recovery rate by increasing the amount of purge gas in purge and regeneration step. The optimal P/F ratio was found to be 0.08. As the cycle time increased, the product purity decreased by increasing the feed gas flow rate. It was found that the optimal operating conditions were P/F ratio of 0.08 and total cycle time of 1,440 seconds with the purity of 97%.

• Applied Chemistry for Engineering
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• v.17 no.2
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• pp.201-209
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• 2006

Various desorption methods were investigated for an activated carbon and zeolite 13X packed bed after benzene adsorption. Desorption experiments using hot steam, purge gas, and evacuation were performed. As a result, the desorption with hot steam showed the best performance. Hot steam makes the temperature in the adsorption column increase and gives arise to the desorption. Drying process should be accompanied to increase the efficiency because steam vapor prevents the adsorption later. The vacuum desorption showed poor performance and it reveals that temperature swing operation is more effective than pressure swing operation. In the purge gas desorption, good performance was achieved using evacuation.

• Applied Chemistry for Engineering
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• v.20 no.6
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• pp.663-669
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• 2009

The honeycomb adsorbent was prepared for adsorbing and seadsorbent was prepared by using zeolite sheet, which contained zeolite as component. The steady-state adsorption properties and surface morphologies were analyzed and breakthrough characteristics were ananlyzed by providing 16% carbon dioxide mixed gas. By thermal regeneration, carbon dioxide concentration properties were analyzed, and the adsorptive separation process was compared between thermal swing adsorption and pressure swing adsorption after adsorbent temperature change during heating. The breakthrough results of the honeycomb showed possibility parating carbon dioxide from combustion exhaust gas, which had deep impact on climate change, and the characteristics of the adsorbent were studied. Na-X zeolite was coated on a honeycomb prepared with ceramic sheet or active carbon sheet so that the two honycomb can be used at high temperature. Third honeycomb of rotary adsorptive concentration process.

• Journal of Korean Society for Atmospheric Environment
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• v.26 no.3
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• pp.286-297
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• 2010

This study deals with the effect of pretreatment on the $CO_2$ adsorption capacity of zeolitic adsorbents including a commercial A-type zeolite and cation exchanged adsorbents. The pre-heating could change the intrinsic properties such as specific surface area and adsorption capacity of the adsorbent. As a result of the experiment, the moisture previously filled inside might affect the potential adsorption capacity of the adsorbent, and could be disappeared throughout the heat treatment. An optimum pretreatment temperature for the test adsorbent was found to be $400^{\circ}C$, at which temperature enabled more than 90% refreshment. Precise examination through the TPD test showed that the TSA (Temperature Swing Adsorption) process would be desirable in dry adsorption of $CO_2$.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.25 no.7
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• pp.521-524
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• 2012

We report on variations of electrical properties with different active layer thickness and post-annealing temperature in amorphous In-Ga-Zn-O (IGZO) thin-film transistors (TFTs). In particular, subthreshold swing (SS) of the IGZO-TFTs was improved as increasing the active layer thickness at an given post-annealing temperature, accompanying the negative shift in turn-off voltage. However, as increasing post-annealing temperature, only turn-off voltage was shifted negatively with almost constant SS value. The effect of the active layer thickness and post-annealing temperature on electrical properties, such as SS, field effect mobility and turn-off voltage in IGZO-TFTs has been explained in terms of the variation of trap density in IGZO channel layer and at gate dielectric/IGZO interface.

• Journal of the Semiconductor & Display Technology
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• v.16 no.1
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• pp.97-101
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• 2017

In this paper, IGZO thin film transistor (TFT) was fabricated with cross-linked Poly (4-vinylphenol) (PVP) gate dielectric for flexible, transparent display applications. The PVP is one of the candidates for low-temperature gate insulators. MIM structure was fabricated to measure the leakage current and evaluate the insulator properties according to the annealing temperature. Low leakage current ( <0.1nA/cm2 @ 1MV/cm ) was observed at $200^{\circ}C$ annealing condition and decreases much more as the annealing temperature increases. The electrical characteristics of IGZO TFT such as subthreshold swing, mobility and ON/OFF current ratio were also improved, which shows that the performance of IGZO TFTs with PVP can be enhanced by reducing the amount of incomplete crosslinking in PVP.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.37 no.1
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• pp.43-47
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• 2024

The size of semiconductor devices has been scaled down to improve packing density and output performance. However, there is uncontrollable spreading of the dopants that comprise the well, punch-stop, and channel-stop when using high-temperature annealing processes, such as rapid thermal annealing (RTA). In this context, low-temperature deuterium annealing (LTDA) performed at a low temperature of 300℃ is proposed to reduce the thermal budget during CMOS fabrication. The LTDA effectively eliminates the interface trap in the gate dielectric layer, thereby improving the electrical characteristics of devices, such as threshold voltage (V_TH), subthreshold swing (SS), on-state current (I_ON), and off-state current (I_OFF). Moreover, the LTDA is perfectly compatible with CMOS processes.

• Proceedings of the KIEE Conference
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• 2011.07a
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• pp.1412-1413
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• 2011

Effects of thermal annealing on electrical characteristics of thin film transistors (TFTs) using hydrogenated zinc oxide (ZnO:H) films as active channel were extensively investigated. The ZnO:H films were deposited at room temperature by RF sputtering. The device parameters of the ZnO:H-based TFTs, such as threshold voltage ($V_{th}$), subthreshold swing (S.S.), and on-off current ratio ($I_{on}/I_{off}$), were characterized in terms of the annealing temperature as well as the gas flow ratio of $H_2$/Ar.

• Journal of Information Display
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• v.12 no.1
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• pp.61-67
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• 2011

A single-clock-driven shift register and a two-stage buffer are proposed, using p-type, low-temperature polycrystalline silicon thin-film transistors. To eliminate the clock skew problems and to reduce the burden of the interface, only one clock signal was adopted to the shift register circuit, without additional reference voltages. A two-stage, p-type buffer was proposed to drive the gate line load and shows a full-swing output without threshold voltage loss. The shift register and buffer were designed for the 3.31" WVGA ($800{\times}480$) LCD panel, and the fabricated circuits were verified via simulations and measurements.