• Journal of Computing Science and Engineering
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• v.4 no.3
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• pp.189-206
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• 2010

It is generally accepted that dynamic voltage scaling (DVS) is one of the most effective techniques of energy minimization for real-time applications in embedded system design. The effectiveness comes from the fact that the amount of energy consumption is quadractically proportional to the voltage applied to the processor. The penalty is the execution delay, which is linearly and inversely proportional to the voltage. According to the granularity of tasks to which voltage scaling is applied, the DVS problem is divided into two subproblems: inter-task DVS problem, in which the determination of the voltage is carried out on a task-by-task basis and the voltage assigned to the task is unchanged during the whole execution of the task, and intra-task DVS problem, in which the operating voltage of a task is dynamically adjusted according to the execution behavior to reflect the changes of the required number of cycles to finish the task before the deadline. Frequent voltage transitions may cause an adverse effect on energy minimization due to the increase of the overhead of transition time and energy. In addition, DVS needs to be carefully applied so that the dynamically varying chip temperature should not exceed a certain threshold because a drastic increase of chip temperature is highly likely to cause system function failure. This paper reviews representative works on the theoretical solutions to DVS problems regarding inter-task DVS, intra-task DVS, voltage transition, and thermal-aware DVS.

• Journal of information and communication convergence engineering
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• v.18 no.4
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• pp.222-229
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• 2020

Recent multi-core processors for smart devices use per-core dynamic voltage and frequency scaling (DVFS) that enables independent voltage and frequency control of cores. However, because the conventional task scheduler was originally designed for per-core DVFS disabled processors, it cannot effectively utilize the per-core DVFS and simply allocates tasks evenly across all cores to core utilization with the same CPU frequency. Hence, we propose a novel task scheduler to effectively utilize percore DVFS, which enables each core to have the appropriate frequency, thereby improving performance and decreasing energy consumption. The proposed scheduler classifies applications into two types, based on performance-sensitivity and allows a performance-sensitive application to have a dedicated core, which maximizes core utilization. The experimental evaluations with a real off-the-shelf smart device showed that the proposed task scheduler reduced 13.6% of CPU energy (up to 28.3%) and 3.4% of execution time (up to 24.5%) on average, as compared to the conventional task scheduler.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.20 no.12
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• pp.2401-2409
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• 2016

Android CPU governors exploit the DVFS (Dynamic Voltage Frequency Scaling) technique. The DVFS is a power management technique where the CPU operating frequency is decreased to allow a corresponding reduction in the CPU supply voltage. The power consumed by a CPU is approximately proportional to the square of the CPU supply voltage. Therefore, lower CPU operating frequency allows the CPU supply voltage to be lowered. This helps to reduce the CPU power consumption. However, lower CPU operating frequency increases a task's execution time. Such an increase in the task's execution time makes the task's response time longer and makes the task's deadline miss occur. This finally leads to degrading the quality of service provided by the task. In this paper, we evaluated the performance of Android CPU governors in terms of the power consumption, tasks's response time and deadline miss ratio.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.46 no.7
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• pp.22-28
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• 2009

As multiprocessors have been widely adopted in embedded systems, task computation energy consumption should be minimized with several low power techniques supported by the multiprocessors. This paper proposes an energy-aware task scheduling algorithm that adopts both dynamic voltage scaling and power shutdown in multiprocessor environments. Considering the timing and energy overhead of power shutdown, the proposed algorithm performs an iterative task assignment and task ordering for multiprocessor systems. In this case, the iterative priority-based task scheduling is adopted to obtain the best solution with the minimized total energy consumption. Total energy consumption is calculated by considering a linear programming model and threshold time of power shutdown. By analyzing experimental results for standard task graphs based on real applications, the resource and timing limitations were analyzed to maximize energy savings. Considering the experimental results, the proposed energy-aware task scheduling provided meaningful performance enhancements over the existing priority-based task scheduling approaches.

• The Journal of the Institute of Internet, Broadcasting and Communication
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• v.17 no.2
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• pp.1-6
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• 2017

Due to the recent advances in IoT technologies, reducing power consumption in battery-based IoT devices becomes an important issue. An IoT device is a kind of real-time systems, and processor voltage scaling is known to be effective in reducing power consumption. However, recent research has shown that power consumption in memory increases dramatically in such systems. This paper aims at combining processor voltage scaling and low-power NVRAM technologies to reduce power consumption further. Our main idea is that if a task is schedulable in a lower voltage mode of a processor, we can expect that the task will still be schedulable even on slow NVRAM memory. We incorporate the NVRAM memory allocation problem into processor voltage scaling, and evaluate the effectiveness of the combined approach.

• Journal of KIISE:Computer Systems and Theory
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• v.29 no.11
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• pp.601-610
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• 2002

Intra-task voltage scheduling (IntraVS), which adjusts the supply voltage within an individual task boundary, is an effective technique for developing low-power applications. In this paper, we propose a novel intra-task voltage scheduling algorithm for hard real-time applications based on average-case execution time. Unlike the conventional IntraVS algorithm where voltage scaling decisions are based on the worst-case execution cycles, tile proposed algorithm improves the energy efficiency by controlling the execution speed based on average-case execution cycles while meeting the real-time constraints. The experimental results using an MPEG-4 decoder program show that the proposed algorithm reduces the energy consumption by up to 34% over conventional IntraVS algorithm.

• Journal of Institute of Convergence Technology
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• v.6 no.2
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• pp.9-13
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• 2016

Robot usually requires spline motion to move through multiple knots. In this paper, catmull-rom spline method is applied to the trajectory planning of industrial robot in task space. Centripetal catmull-rom is selected to avoid self-intersection and slow motion which can be occurred in uniform and chordal spline. The method to set two control points are proposed to satisfy velocity conditions of initial and final knots. To optimize robot motion, time scaling method is presented to minimize margin between real robot value and maximum value in velocity and acceleration. The simulation results show that the proposed methods are applied to trajectory planning and robot can follow the planned trajectory while robot motion does not exceed maximum value of velocity and acceleration.

• Journal of the Korea Academia-Industrial cooperation Society
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• v.7 no.5
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• pp.866-874
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• 2006

This paper proposes a new Dynamic Voltage Scaling(DVS) algorithm to achieve low-power scheduling of aperiodic hard real-time tasks. Aperiodic tasks schedulingcannot be applied to the conventional DVS algorithm and result in consuming energy more than periodic tasks because they have no period, non predictable worst case execution time, and release time. In this paper, we defined Virtual Periodic Task Set(VTS) which has constant period and worst case execution time, and released aperiodic tasks are assigned to this VTS. The period and worst case execution time of the virtual task can be obtained by calculating task utilization rate of both periodic and aperiodic tasks. The proposed DVS algorithm scales the frequency of both periodic and aperiodic tasks in VTS. Simulation results show that the energy consumption of the proposed algorithm is reduced by 11% over the conventional DVS algorithm for only periodic task.

• The Journal of the Korea Contents Association
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• v.7 no.1
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• pp.83-93
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• 2007

In this paper, we address a power-aware scheduling algorithm for a mixed real-time system which consists of periodic and sporadic tasks, each of which is characterized by its minimum period, worst-case execution requirement and deadline. We propose a dynamic voltage scaling algorithm called DVSMT(DVS for mixed tasks), which dynamically scales down the supplying voltage(and thus the frequency) using on-line distribution of the borrowed resources when jobs complete while still meeting their deadlines. With this scheme, we could reduce more energy consumption. As the proposed algorithm can be easily incorporated with RTOS(Real-Time Operating System), it is applicable for handhold devices and sensor network nodes that use a limited battery power. Simulation results show that DVSMT saves up 60% more than the existing algorithms both in the periodic-task and mixed-task systems.

• Proceedings of the Korean Society of Soil and Groundwater Environment Conference
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• 2003.09a
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• pp.140-143
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• 2003

Air permeabilities in unsaturated fractured tuff at the Apache Leap Research Site (ALRS) near Superior, Arizona, exhibit a self-affine behavior, thus renders a field random fractal. Based up fractal scaling, the observed scale effect has been interpreted [Hyun et al., 2002]. Recently, Frantziskonis and Hansen [2000] presented that fractal scaling can be represented based on wavelets. This study deals with the way of using wavelets for fractal scaling. A numerical study is presented to examine the applicability of wavelet-based approach to determining upscaled air permeability values on various data supports at the site. To characterize the scaling property of self-affine fields generated based upon wavelets, Hurst coefficient, H. was inferred by applying the average wavelet coefficient (AWC) method. The result yielded H = 0.24, which is very close to the result of geostatistical analysis using a power variogram (H = 0.22). The study concludes that wavelet-based scaling is a useful way of determining parameter values on different data supports, which is an essential task for modeling of subsurface flow and mass transport in a numeric grid with different resolutions (grid size).