• Title/Summary/Keyword: TCAD simulator

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Development of integrated TCAD for VLSI process simulation (반도체 공정 시뮬레이션을 위한 통합 TCAD 개발)

  • 윤상호;이경일;공성원;이재희;원태영
    • Journal of the Korean Institute of Telematics and Electronics A
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    • v.33A no.5
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    • pp.108-116
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    • 1996
  • A semiconductor process imulator operated in windows$^{TM}$ environment has been developed. two-dimensional process simulation in personal computer has been enabled due to the improvement of CPU speed and the efficient use of memory. The process simulator in this paper is capable of calculating diffusion, oxidation, ion implantation, etching and deposition in two-dimensional manner. In addition, graphic-user-friendly editor, parser, and multi-dimensional graphical routine is also available in the devloped simulator.

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Analysis of Impact ionization models for Si n-MOSFET (Si기반 n-MOSFET의 임팩트이온화모델 분석)

  • ;;;Chaisak Issro
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2002.05a
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    • pp.268-270
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    • 2002
  • For analysis of semiconductor's electrons transmission characteristics, Impact ionization(I.I.) is very important. I.I. are generation process of electron-hole pairs. Therefore, the characteristics of device can change along with applied voltage or temperature. In this paper, we are scaled down the gate length to 50nm. Also, using TCAD simulator, we are analyzed I.I. and breakdown about three models-Van Overstraeten , Okuto and Ours models.

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Characterization of Density-of-States in Polymer-based Organic Thin Film Transistors and Implementation into TCAD Simulator

  • Kim, Jaehyeong;Jang, Jaeman;Bae, Minkyung;Lee, Jaewook;Kim, Woojoon;Hur, Inseok;Jeong, Hyun Kwang;Kim, Dong Myong;Kim, Dae Hwan
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.13 no.1
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    • pp.43-47
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    • 2013
  • In this work, we report extraction of the density-of-states (DOS) in polymer-based organic thin film transistors through the multi-frequency C-V spectroscopy. Extracted DOS is implemented into a TCAD simulator and obtained a consistent output curves with non-linear characteristics considering the contact resistance effect. We employed a Schottky contact model for the source and drain to fully reproduce a strong nonlinearity with proper physical mechanisms in the output characteristics even under a very small drain biases. For experimental verification of the model and extracted DOS, 2 different OTFTs (P3HT and PQT-12) are employed. By controlling the Schottky contact model parameters in the TCAD simulator, we accurately reproduced the nonlinearity in the output characteristics of OTFT.

The Current-Voltage Characteristics analysis of EPI MOSFET using TCAD (TCAD를 이용한 EPI MOSfET의 전류-전압 특성 분석)

  • 김재홍;장광균;심성택;정학기;이종인
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2000.10a
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    • pp.490-493
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    • 2000
  • The technology for characteristics analysis of device for high integration is changing rapidly. Therefore to understand characteristics of high integrated device by computer simulation and to fabricate the device having such characteristics became one of very important subjects. As devices become smaller to submicron, we have investigated MOSFET built on an epitaxial layer(EPI) of a heavily-doped ground plane by TCAD(Technology Computer Aided Design) to develop optimum device structure. We compared and analyzed the characteristics of such device structure, i.e., impact ionization, electric field and I-V characteristics curve with lightly-doped drain(LDD) MOSFET. Also, we presented that TCAD simulator is suitable for device simulation.

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A study on the pinch-off characteristics for Double Cate MOSFET in nuo structure (나노 구조 Double Gate MOSFET의 핀치오프특성에 관한 연구)

  • 고석웅;정학기
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.6 no.7
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    • pp.1074-1078
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    • 2002
  • In this paper, we designed double gate(DG) MOSFET structure which has main gate(MG) and two side gates(SG). We have simulated using TCAD simulator U .WOSFET have the main gate length of %m and the side gate length of 70nm. Then, u'e have investigated the pinch-off characteristics, drain voltage is changed from 0V to 1.5V at VMG=1.5V and VSG=3.0V. In spite of the LMG is very small, we have obtained a very good pinch-off characteristics. Therefore, we know that the DG structure is very useful at nano scale.

A study on the pinch-off characteristics for Double Gate MOSFET in nano structure (나노 구조 Double Gate MOSFET의 핀치오프특성에 관한 연구)

  • 고석웅;정학기
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2002.11a
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    • pp.498-501
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    • 2002
  • In this paper, we designed double gate(DG) MOSFET structure which has main gate(MG) and two side gates(SG). We have simulated using TCAD simulator. DG MOSFET have the main gate length of nm and the side gate length of 70nm. Then, we have investigated the pinch-off characteristics, drain voltage is changed from 0V to 1.5V at VMG=1.5V and VSG=3.0V. In spite of the LMG is very small, we have obtained a very good pinch-off characteristics. Therefore, we know that the DG structure is very useful at nino scale.

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The Study of Circuit Model Parameter Generation Using Device Simulation (소자 시뮬레이션을 이용한 Circuit Model Parameter 생성에 대한 연구)

  • 이흥주
    • Journal of the Korea Academia-Industrial cooperation Society
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    • v.4 no.3
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    • pp.177-182
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    • 2003
  • In the case of the flash memory, various kinds of transistors and the wide range of operation voltage are necessary to achieve the read/write operations. Therefore, the characteristics of transistors are measured in the silicon for the circuit design, and the test vehicle run must be processed. In this study, an efficient design flow is suggested using TCAD tools. The test vehicle is replaced with well-calibrated TCAD simulation. First, the calibration methodology is introduced and tested for flash memory device. The calibration errors are less than 5% of a full chip operation, which is accepted by the designers. The results of the calibration were used to predict I-V curves and model parameter of the various transistors for the design of flash device.

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Analysts on the Sealing of Nano Structure MOSFET (나노 구조 MOSFET의 스켈링에 대한 특성 분석)

  • 장광균;정학기;이종인
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.5 no.3
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    • pp.573-579
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    • 2001
  • The technology for characteristic analysis of device for high integration is changing rapidly. Therefore to understand characteristics of high -integrated device by computer simulation and fabricate the device having such characteristics became one of very important subjects. As devices become smaller from submicron to nanometer, we have investigated MOSFET built on an epitaxial layer(EPI) of a heavily-doped ground plane by TCAD(Technology Computer Aided Design) to develop optimum device structure. We analyzed and compared the EPI device characteristics such as impact ionization, electric field and I-V curve with those of lightly doped drain(LDD) MOSFET. Also, we presented that TCAD simulator is suitable for device simulation and the scaling theory is suitable at nano structure device.

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Analysis on the Scaling of Nano Structure MOSFET (나노 구조 MOSFET의 스켈링에 대한 특성 분석)

  • 장광균;정학기;이종인
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2001.05a
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    • pp.311-316
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    • 2001
  • The technology for characteristic analysis of device for high integration is changing rapidly. Therefore to understand characteristics of high-integrated device by computer simulation and fabricate the device having such characteristics became one of very important subjects. At devices become smaller from submicron to nanometer, we have investigated MOSFET built on an epitaxial layer(EPI) of a heavily-doped ground plane, and also newEPI MOSFET for improved structure to weak point of LDD structure by TCAD(Technology Computer Aided Design) to develop optimum device structure. We analyzed and compared the EPI device characteristics such as impart ionization, electric field and I-V curve with those of lightly-doped drain(LDD) MOSFET. Also, we presented that TCAD simulator is suitable for device simulation and the scaling theory is suitable at nano structure device.

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Analysis on the Scaling of MOSFET using TCAD (TCAD를 이용한 MOSFET의 Scaling에 대한 특성 분석)

  • 장광균;심성택;정정수;정학기;이종인
    • Proceedings of the Korean Institute of Information and Commucation Sciences Conference
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    • 2000.05a
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    • pp.442-446
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    • 2000
  • The metal-oxide-semiconductor field-effect transistor(MOSFET) has undergone many changes in the last decade in response to the constant demand for increased speed, decreased power, and increased parking density. Therefore, it was interested in scaling theory, and full-band Monte Carlo device simulator has been used to study the effects of device scaling on hot carriers in different MOSFET structures. MOSFET structures investigated in this study include a conventional MOSFET with a single source/drain, implant a lightly-doped drain(LDD) MOSFET, and a MOSFET built on an epitaxial layer(EPI) of a heavily-doped ground plane, and those are analyzed using TCAD(Technology Computer Aided Design) for scaling and simulation. The scaling has used a constant-voltage scaling method, and we have presented MOSFET´s characteristics such as I-V characteristic, impact ionization, electric field and recognized usefulness of TCAD, providing a physical basis for understanding how they relate to scaling.

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