• Korean Journal of Clinical Laboratory Science
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• v.55 no.4
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• pp.253-260
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• 2023

The germanium-68/gallium-68 (⁶⁸Ge/⁶⁸Ga) generator has high spatial utilization and requires little maintenance, making it economical and easy to produce. Thus, the frequency of use of ⁶⁸Ga radiopharmaceuticals is rapidly increasing worldwide. Therefore, this study attempted to develop an automated synthesizer for the routine clinical application of ⁶⁸Ga radiopharmaceuticals. The automated synthesizer was based on a fixed tubing system and the structure was designed after adjusting the position of the parts to reflect the synthesis method. Using various components that can be supplied in Korea, the automated synthesizer was manufactured at a much lower price cost than that of a commercialized automated synthesizer sold by companies. ⁶⁸Ga-DOTA-[Tyr3]-octreotide (⁶⁸Ga-DOTATOC) was synthesized to evaluate the performance of the automated synthesizer. ⁶⁸Ga-DOTATOC could be synthesized with about 65% of non-decay corrected yield, and the synthesized ⁶⁸Ga-DOTATOC met all quality control standards. We have synthesized ⁶⁸Ga-DOTATOC more than 100 times, and only faced a few problems caused by mechanical errors. In this study, we successfully developed a simple automated synthesizer for ⁶⁸Ga radiopharmaceuticals with high reproducibility. As various ⁶⁸Ga radiopharmaceuticals have recently been developed, it is expected that the automated synthesizer developed in this study will be useful for routine clinical use.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.24 no.11
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• pp.1074-1080
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• 2013

The low phase noise and wideband frequency synthesizer has been designed by using YTO. Offset PLL structure is used for reducing a division ratio of feedback loop. The phase noise modeling is applied to optimize loop filter of PLL and YTO module. And DDS is used as reference signal of frequency synthesizer for fine resolution. The fabricated wideband frequency synthesizer has the output frequency of 3.2 GHz to 6.8 GHz, phase noise of -107 dBc/Hz at 10 kHz offset from the carrier and frequency resolution of 1 Hz. The measured phase noise is well agreed with the simulated one.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.7 no.5
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• pp.879-886
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• 2003

Agile frequency synthesizers are the common device used for commandable, wide-band frequency hopping in frequency-hopped (FH) communications. In this paper, synthesizer phase transient effect and its compensation methods in an FH/FSK(Frequency Hopped Frequency Shift Keying) system are studied. Models for these analysis are developed and resulting performance degradations are computed. The basic PLL is difficult to implement for fast frequency hopping in narrowband radio communication systems. To solve this problem, digital frequency synthesizer/CPM (Continuous Phase Modulation)modulator is proposed. And it's performance is analyzed theoretically. The analysis show that fast frequency hopping is possible in frequency hopping system that use digital frequency synthesizer/CPM modulator.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.25 no.9
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• pp.903-911
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• 2014

This paper proposes a high speed frequency synthesizer with dual phase-locked loop(PLL) structure to improve phase noise level and shape in a wideband receiver. To reduce phase noise and fractional spur, a output frequency of $1^{st}$ PLL used as reference frequency of $2^{nd}$ PLL is changed. The frequency synthesizer has been designed with 1 Hz frequency resolution using digital NCO in 6.5~8.5 GHz wide spectrum. The measured results of the fabricated frequency synthesizer show that the output power is about -3 dBm, the maximum lock-in time and phase noise are within 60 us and -95 dBc/Hz at 10 kHz offset, respectively.

• Journal of the Institute of Electronics Engineers of Korea TC
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• v.48 no.12
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• pp.28-34
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• 2011

In this paper, a PLL frequency synthesizer for RSSI applications is designed by phase noise analysis. Required synthesizer performance is achieved by optimizing the noise performance of PLL components and a loop transfer function, since its phase noise, lock time, and spur suppression capability are determined by the performance of loop components and loop filter characteristics. As an application example, a PLL frequency synthesizer for RSSI applications, which operates at the frequency of 2.288GHz, is designed using the phase noise analysis. The validity of the design technique is proved by experiments.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.11 no.6
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• pp.959-968
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• 2000

In this paper, a low phase noise frequency synthesizer used to TX local oscillator in BWLL RF tranceiver is presented. The phase-locked stable 25GHz-band frequencies in BWLL TX LO are obtained by using 2 GHz baseband frequency synthesizer, sixth-harmonic frequency multiplier and frequency doubler at 12 GHz band frequency input. The 25 GHz band frequency synthesizer presented in this paper has 3-output frequencies at 24.92 GHz, 25.10 GHz, 25.26 GHz. At 24.92 GHz frequency the synthesizer has 0.44 dBm output power and shows -87.93 dBc/Hz(a 10 KHz), -109.54 dBc/Hz (a100 KHz) phase noise characteristics .

• The Journal of Information Technology
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• v.12 no.4
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• pp.11-17
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• 2009

In this paper, frequency synthesizer for radar system is designed and developed. Optimizing the phase noise and lock time, each module is designed as two-type PLL circuit, and then the performance of PLL frequency synthesizer is compared. The experiment result shows the lock time of 70 usec, the phase noise of less then 100 dBc, the bandwidth above 500MHz.

• Proceedings of the IEEK Conference
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• 1999.11a
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• pp.163-166
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• 1999

In this paper, frequency synthesizer that can be used in IMT-2000 was designed and fabricated using dual loop PLL(Phase Locked Loop). For improving phase noise characteristic Voltage Controlled Oscillator was fabricated using coaxial resonator and eliminated frequency divider using SPD as phase detector and increased open loop gain. Fabricated frequency synthesizer had 1.82㎓ center frequency, 160MHz tuning range and -119.73㏈c/Hz low phase noise characteristic.

• Journal of the Korean Institute of Telematics and Electronics A
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• v.29A no.4
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• pp.83-90
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• 1992

The state machine synthesizer is widely used to FSM synthesis. In this paper, we developed the state machine description language "state CHDL" such as IF, THEN, ELSE, SWITCH, CASE statements. Also, an algorithm for efficient state minimization and two level minimizer of FSM and graphical user interface-pin map window, supporting the designer with input-ouput effency, are presented.

• Proceedings of the KIEE Conference
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• 1987.11a
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• pp.86-89
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• 1987

This paper treats with the design and fabrication of a frequency synthesizer for the generation of intermediate frequency of a HF band transceiver. The synthesizer is designed to control frequencies using a phase-locked loop and it is shown that method improved the performance of frequency accuracy and locking time then that of the crystal-reference system.