• Journal of the Korea Society of Computer and Information
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• v.16 no.1
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• pp.143-151
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• 2011

Plaintext and key are independent in the existing block cipher. Also, encryption/decryption is performed by using structural features. Therefore, the external environment of suggested mixed cryptographic algorithm is identical with the existing ones, but internally, features of the existing block cipher were meant to be removed by making plaintext and key into dependent functions. Also, to decrease the loads on the authentication process, authentication add-on with dependent characteristic was included to increase the use of symmetric cryptographic algorithm. Through the simulation where the proposed cryptosystem was implemented in the chip level, we show that our system using the shorter key length than the length of the plaintext is two times faster than the existing systems.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.16 no.4
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• pp.778-784
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• 2012

A symmetric block cryptosystem uses an identical cryptographic key at encryption and decryption processes. HIGHT cipher algorithm is 64-bit block cryptographic technology for mobile device that was authorized as international standard by ISO/IEC on 2010. In this paper, block cipher HIGHT algorithm is designed using Verilog-HDL. Four modes of operation for block cipher such as ECB, CBC, OFB and CTR are supported. When continuous message blocks of fixed size are encrypted or decrypted, the desigend HIGHT core can process a 64-bit message block in every 34-clock cycle. The cryptographic processor designed in this paper operates at 144MHz on vertex chip of Xilinx, Inc. and the maximum throughput is 271Mbps. The designed cryptographic processor is applicable to security module of the areas such as PDA, smart card, internet banking and satellite broadcasting.

• Journal of Satellite, Information and Communications
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• v.10 no.3
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• pp.114-120
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• 2015

In this paper, we show the design requirements of the cryptographic module and its security algorithm designed to prevent the exposure of the command signal applied to Flight Termination System. The cryptographic module consists of two separate devices that are Command Insertion Device and Command Generation Device. The cryptographic module designed to meet the 3 principles(Confidentiality, Integrity and Availability) for the information security. AES-256 block encryption algorithm and SHA-256 Hash function were applied to the encrypted symmetric key encryption method. The proposed cryptographic module is expected to contribute to the security and reliability of the Flight Termination System for Space Launch Vehicle.

• Journal of Advanced Information Technology and Convergence
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• v.9 no.2
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• pp.115-123
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• 2019

White-box cryptography is an implementation technique in order to protect secret keys of cryptographic algorithms in the white-box attack model, which is the setting that an adversary has full access to the implementation of the cryptographic algorithm and full control over their execution. This concept was introduced in 2002 by Chow et al., and since then, there have been many proposals for secure implementations. While there have been many approaches to construct a secure white-box implementation for the ciphers with SPN structures, there was no notable result about the white-box implementation for the block ciphers with Feistel structure after white-box DES implementation was broken. In this paper, we propose a secure white-box implementation for a block cipher SEED with Feistel structure, which can prevent the previous known attacks for white-box implementations. Our proposal is simple and practical: it is performed by only 3,376 table lookups during each execution and the total size of tables is 762.5 KB.

• Journal of the Korea Academia-Industrial cooperation Society
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• v.11 no.12
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• pp.4962-4967
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• 2010

Security of the electronic commercial transaction especially through the information communication network is gaining its significance due to rapid development of information and communication related fields. For that, some kind of cryptographic algorithm is already in use for the smart card. However, the growing needs of handling multimedia and real time communication bring the smart card into more stringent use of its resources. Therefore, we proposed a key scheduler block of the smart card to facilitate multimedia communication and real time communication.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.20 no.4
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• pp.786-792
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• 2016

Camellia was jointly developed by Nippon Telegraph and Telephone Corporation and Mitsubishi Electric Corporation in 2000. Camellia specifies the 128-bit message block size and 128-, 192-, and 256-bit key sizes. In this paper, a modified round operation block which unifies a register setting for key schedule and a conventional round operation block is proposed. 16 ROMs needed for key generation and round operation are implemented using only 4 dual-port ROMs. Due to the use of a message buffer, encryption/decryption can be executed without a waiting time immediately after KA and KB are calculated. The suggested block cipher Camellia algorithm is designed using Verilog-HDL, implemented on Virtex4 device and operates at 184.898MHz. The designed cryptographic core has a maximum throughput of 1.183Gbps in 128-bit key mode and that of 876.5Mbps in 192 and 256-bit key modes. The cryptographic core of this paper is applicable to security module of the areas such as smart card, internet banking, e-commerce and satellite broadcasting.

• Journal of Internet Computing and Services
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• v.21 no.3
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• pp.11-19
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• 2020

In this paper, a merged TEA block cipher processor which unifies Tiny Encryption Algorithm(TEA), extended Tiny Encryption Algorithm(XTEA) and corrected block TEA(XXTEA) is designed. After TEA cipher algorithm was first designed, XTEA and XXTEA cipher algorithms were designed to correct security weakness. Three types of cipher algorithm uses a 128-bit master key. The designed cipher processor can encrypt or decrypt 64-bit message block for TEA/XTEA and variable-length message blocks up to 256-bit for XXTEA. The maximum throughput for 64-bit message blocks is 137Mbps and that of 256-bit message blocks is 369Mbps. The merged TEA block cipher designed in this paper has a 16% gain on the area side compared to a lightweight LEA cipher. The cryptographic IP of this paper is applicable in security module of the mobile areas such as smart card, internet banking, and e-commerce.

• Journal of Internet Computing and Services
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• v.18 no.5
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• pp.1-8
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• 2017

Lightweight Encryption Algorithm(LEA) was developed by National Security Research Institute(NSRI) in 2013 and targeted to be suitable for environments for big data processing, cloud service, and mobile. LEA specifies the 128-bit message block size and 128-, 192-, and 256-bit key sizes. In this paper, block cipher LEA algorithm which can encrypt and decrypt 128-bit messages is designed using Verilog-HDL. The designed IP for encryption and decryption has a maximum throughput of 874Mbps in 128-bit key mode and that of 749Mbps in 192 and 656Mbps in 256-bit key modes on Xilinx Vertex5. The cryptographic IP of this paper is applicable as security module of the mobile areas such as smart card, internet banking, e-commerce and IoT.

• Journal of the Korea Academia-Industrial cooperation Society
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• v.21 no.11
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• pp.878-883
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• 2020

Cryptographic algorithms are used to prevent the illegal manipulation of data. They are divided into public-key cryptosystems and symmetric-key cryptosystems. Public-key cryptosystems require considerable time for encryption and decryption compared to symmetric-key cryptosystem. On the other hand, key management, and delivery are easier for public-key cryptosystems than symmetric-key cryptosystems because different keys are used for encryption and decryption. Furthermore, hash functions are being used very effectively to verify the integrity of the digital content, as they always generate output with a fixed size using the data of various sizes as input. This paper proposes a method using RSA public-key cryptography and a hash function to determine if a digital image is deformed or not and to detect the manipulated location. In the proposed method, the entire image is divided into several blocks, 64×64 in size. The watermark is then allocated to each block to verify the deformation of the data. When deformation occurs, the manipulated pixel will be divided into smaller 4×4 sub-blocks, and each block will have a watermark to detect the location. The safety of the proposed method depends on the security of the cryptographic algorithm and the hash function.

• KIPS Transactions on Computer and Communication Systems
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• v.11 no.12
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• pp.453-460
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• 2022

As high-performance quantum computers are expected to be developed, studies are being actively conducted to build a post-quantum security system that is safe from potential quantum computer attacks. When the Grover's algorithm, a representative quantum algorithm, is used to search for a secret key in a symmetric key cryptography, there may be a safety problem in that the security strength of the cipher is reduced to the square root. NIST presents the post-quantum security strength estimated based on the cost of the Grover's algorithm required for an attack of the cryptographic algorithm as a post-quantum security requirement for symmetric key cryptography. The estimated cost of Grover's algorithm for the attack of symmetric key cryptography is determined by the quantum circuit complexity of the corresponding encryption algorithm. In this paper, the quantum circuit of the SCHWAEMM algorithm, AEAD family of SPARKLE, which was a finalist in NIST's lightweight cryptography competition, is efficiently implemented, and the quantum cost to apply the Grover's algorithm is analyzed. At this time, the cost according to the CDKM ripple-carry adder and the unbounded Fan-Out adder is compared together. Finally, we evaluate the post-quantum security strength of the lightweight cryptography SPARKLE SCHWAEMM algorithm based on the analyzed cost and NIST's post-quantum security requirements. A quantum programming tool, ProjectQ, is used to implement the quantum circuit and analyze its cost.