• Proceedings of the Korean Information Science Society Conference
• /
• 2001.10c
• /
• pp.31-33
• /
• 2001

전통적으로 스캔 설계 법칙 검사는 게이트 레벨에서 수행되었다. 그러나 RTL 설계와 합성 도구의 사용이 일반화되면서 게이트 레벨 회로의 검사는 합성 단계에서의 최적화와 스캔 설계 법칙 위배를 정정한 후의 최적화가 필요하여 많은 시간이 소요된다. RTL에서의 스캔 설계 법칙 검사는 이러한 문제를 해결할 수 있으며, 이것이 본 논문의 주제이다. 본 논문에서는 스캔 설계 법칙의 위배를 RTL 설계에서 검사할 수 있는 기법을 제안한다. 이 기법은 효과적인 설계 과정에 의해 설계 시간 을 단축할 수 있을 것이다.

• Proceedings of the IEEK Conference
• /
• 2003.07b
• /
• pp.939-942
• /
• 2003

Design verification problem is emerging as an important issue to detect any design errors at the early stage of the design. Conventionally, design verifications have been done using a simulation technique. However, this technique has been proved not to cover all potential design errors. Therefore, formal technique is often used to verify digital circuits as an alternative. In this paper we adopted formal verification technique and verified some important properties derived from our pipelined digital systems, using SMV (Symbolic Model Verifier). Our example shows that model checking method (one of formal verification techniques) can be effectively performed in verifying the large digital systems.

• Journal of the Institute of Electronics Engineers of Korea CI
• /
• v.39 no.3
• /
• pp.1-17
• /
• 2002

In this paper, we present our experiences in using symbolic model checker(SMV) to analyze a number of properties of RACE cache coherence protocol designed by ETRI(Electronics and Communications Research Institute) and to verify that RACE protocol satisfies important requirements. To investigate this, we specified the model of the RACE protocol as the input language of SMV and specified properties as a formula in temporal logic CTL. We successfully used the symbolic model checker to analyze a number of properties of RACE protocol. We verified that abnormal state/input combinations was not occurred and every possible request of processors was executed correctly We verified that RACE protocol satisfies liveness, safety and the property that any abnormal state/input combination was never occurred. Besides, We found some ambiguities of the specification and a case of starvation that the protocol designers could not expect before. By this verification experience, we show advantages of model checking method. And, we propose a new method to generate automatically test cases which are used in simulation and testing.

• Proceedings of the KIPE Conference
• /
• 2001.10a
• /
• pp.47-51
• /
• 2001

In this paper, we have explained electrical characteristics of a step-down Rosen type piezoelectric transformer for AC-adapter. When the electric voltage is applied to the driving piezoelectric vibrator polarized in the longitudinal direction, then output voltage is generated at the generating piezoelectric vibrator polarized in the thickness direction due to the piezoelectric effects. From the piezoelectric direct and converse effects, symbolic expressions between the electric inputs and outputs of the step-down piezoelectric transformer have derived with an equivalent circuit model. With the symbolic expressions, load and frequency characteristics have discussed through simulation. Output voltage and current from a 11-layered and a 13-layered piezoelectric transformers were measured under the various conditions of loads and frequencies. First we measured resonant frequency from impedance curve and got equivalent impedance value of the piezoelectric transformer from admittance plot. It was shown from experiments that output voltage has increased and resonant frequency has changed according to various resistor loads. Output current has decreased inversely proportional to changing of loads. Moreover, the measured values of output voltage and current are well agreed with the simulated values of the proposed equivalent circuit model.

• Journal of Broadcast Engineering
• /
• v.26 no.7
• /
• pp.838-843
• /
• 2021

This paper presents an algorithm for effective retrieval of score information to an input score image. The originality of the proposed algorithm is that it is designed to be robust to recognition errors by an OMR (Optical Music Recognition), while existing methods such as pitch histogram requires error induced OMR result be corrected before retrieval process. This approach helps people to retrieve score without training on music score for error correction. OMR takes a score image as input, recognizes musical symbols, and produces structural symbolic notation of the score as output, for example, in MusicXML format. Among the musical symbols on a score, it is observed that filled noteheads are rarely detected with errors with its simple black filled round shape for OMR processing. Barlines that separate measures also strong to OMR errors with its long uniform length vertical line characteristic. The proposed algorithm consists of a descriptor for a score and a similarity measure between a query score and a reference score. The descriptor is based on note-count, the number of filled noteheads in a measure. Each part of a score is represented by a sequence of note-count numbers. The descriptor is an n-gram sequence of the note-count sequence. Simulation results show that the proposed algorithm works successfully to a certain degree in score image-based retrieval for an erroneous OMR output.

• Proceedings of the Korea Society for Simulation Conference
• /
• 2001.10a
• /
• pp.141-146
• /
• 2001

An Information Retrieval System offers the integrated view of SCM(Supply Chain Management) information to the enterprise by making it possible to exchange data between regionally distributed heterogeneous computers and also to enable these computers to access various types of databases. The Information Retrieval System is modeled using Data Registry Model based on X3.285. We only verify the MetaData Registry Manager(MDR Manager) among the core parts using SMV(Symbolic Model Verifier) in order to verify whether our model satisfies the requirements under the given assumptions.

• Proceedings of the Korea Society for Simulation Conference
• /
• 2002.05a
• /
• pp.43-49
• /
• 2002

본 연구는 첨단 신호 시스템 알고리즘의 최적해를 구하는 문제를 기호적 시뮬레이션 기법으로 해결하기 위한 방법론을 제시한다. 최근 지능형 교통 시스템의 일환으로 최적화 된 교통신호를 생성하기 위한 신호제어기법들이 많이 개발되었다. 하지만 이러한 신호제어기법은 복잡한 교통환경에서 신호제어 변수간의 다양한 상호작용의 모든 해를 제공할 수 없는 한계를 지닌다. 한편 기호적 시뮬레이션 기법은 발생 가능한 모든 사건과 시간관계를 자동 생성시킴으로써 동적으로 변화하는 다양한 교통환경에 대해서 신호제어 변수간의 모든 시간관계를 추론해 낼 수 있는 장점을 지닌다. 하지만 기호적 시뮬레이션을 이용한 모델링에 있어서 교통량과 같은 양적인 요소들의 기호적 표현에는 어려움이 따른다. 따라서 본 논문에서는 교통량과 같은 양적인 요소들을 시간에 따른 변화량으로 해석하여 첨단 신호 시스템 알고리즘의 최적해를 구하는 문제에 접근한다. 이를 위해 국내 첨단 신호 시스템을 대상으로 신호제어 전략에 필요한 양적 요소를 검토하고, 이러한 양적 요소를 시간에 따른 변화량으로 해석하여 모델링 하고, 기호적 시뮬레이션 실험을 수행하여 최적신호 제어 알고리즘을 생성한다.

• 제어로봇시스템학회:학술대회논문집
• /
• 2002.10a
• /
• pp.115.2-115
• /
• 2002

A real-time vehicle simulation system is a key element of a driving simulator because accurate prediction of vehicle motion with respect to driver input is required to generate realistic visual, motion, sound and proprioceptive cues. In order to predict vehicle motion caused by various driving actions of the driver on board the simulator, the vehicle model should consist of complete subsystems. On this paper, a tracked vehicle dynamic model with high efficiency and effectiveness is introduced that has been implemented on a training driving simulator. The multi-body vehicle model is based on recursive formulation and has been automatically generated from a symbolic computation package develop...

• Proceedings of the KSMRM Conference
• /
• 2001.11a
• /
• pp.107-107
• /
• 2001

목적： 초상자성 nano-particle 조영제의 자기이완효과에 관한 out sphere 기전에 기초하여 각각의 자기장의 세기에서 T1/T2 자기이완율을 나타내는 NMRD profile을 수치적으로 simulation 하는 프로그램을 개발하고자 하였다. 대상 및 방법： 초상자성 nano-particle 조영제의 경우 초상자성 물질을 생체적합성 고분자로 표면 coating하기 때문에 상자성 조영제와는 달리 전적으로 "out sphere"기여도만을 고려하였고 또한 초상자성 물질의 경우 자기적 에너지의 크기가 매우 크기 때문에 상자성 조영제의 기전에서 사용되는 "low field"근사를 사용할 수 없으므로 Brillouin 함수로 표현되는 총자화에 대한 표현을 적용하였다. nano-particle내에 포함된 Fe 원자수에 따른 T1 및 T2 NMRD Profile과 온도에 따른 T1 및 T2 NMRD Profile 그리고 초상자성 nano-particle size에 따른 T1 및 T2 NMR Profile을 PC (CPU=800 Mhz, memory=128 MB) 환경하에서 symbolic computation tool 인 MathCad (MathCad, USA)를 사용하여 구현하였다.

• Journal of the Korea Institute of Information Security & Cryptology
• /
• v.11 no.2
• /
• pp.13-26
• /
• 2001

This paper presents the network security modeling methodology and simulation using the hierarchical and modular modeling and simulation framework. Recently, Howard and Amoroso developed the cause-effect model of the cyber attack, defense, and consequences, Cohen has been proposed the simplified network security simulation methodology using the cause-effect model, however, it is not clear that it can support more complex network security model and also the model-based cyber attack simulation. To deal with this problem, we have adopted the hierarchical and modular modeling and simulation environment so called the System Entity Structure/Model Base (SES/MB) framework which integrates the dynamic-based formalism of simulation with the symbolic formalism of AI. Several simulation tests performed on sample network system verify the soundness of our method.