• Title/Summary/Keyword: Switching circuit

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A Study on Characteristic Analysis of Single-Stage High Frequency Resonant Inverter Link Type DC-DC Converter (단일 전력단 고주파 공진 인버터 링크형 DC-DC 컨버터의 특성해석에 관한 연구)

  • Won, Jae-Sun;Park, Jae-Wook;Seo, Cheol-Sik;Cho, Gyu-Pan;Jung, Do-Young;Kim, Dong-Hee
    • Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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    • v.20 no.2
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    • pp.16-23
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    • 2006
  • This paper presents a novel single-stage high frequency resonant inverter link type DC-DC converter using zero voltage switching with high power-factor. The proposed topology is integrated half-bridge boost rectifier as power factor corrector(PFC) and half-bridge high frequency resonant converter into a single-stage. The input stage of the half-bridge boost rectifier works in discontinuous conduction mode(DCM) with constant duty cycle and variable switching frequency. So that a boost converter makes the line current follow naturally the sinusoidal line voltage waveform. Simulation results have demonstrated the feasibility of the proposed high frequency resonant converter. Characteristics values based on characteristics analysis through circuit analysis is given as basis data in design procedure. Also, experimental results are presented to verify theoretical discussion. This proposed inverter will be able to be practically used as a power supply in various fields as induction heating applications, fluorescent lamp and DC-DC converter etc.

Design of a PWM DC-DC Boost Converter IC for Mobile Phone Flash (휴대전화 플래시를 위한 PWM 전류모드 DC-DC converter 설계)

  • Jung, Jin-Woo;Heo, Yun-Seok;Park, Yong-Su;Kim, Nam-Tae;Song, Han-Jung
    • Journal of the Korea Academia-Industrial cooperation Society
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    • v.12 no.6
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    • pp.2747-2753
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    • 2011
  • In this paper, a PWM current-mode DC-DC boost converter for mobile phone flash application has been proposed. The converter which is operated with 5 Mhz high switching frequency is capable of reducing mounting area of passive devices such as inductor and capacitor, consequently is suitable for compact mobile phones. This boost converter consists of a power stage and a control block. Circuit elements of the power stage are inductor, output capacitor, MOS transistors and feedback resistors. Meanwhile, the control block consists of pulse width modulator, error amplifier, oscillator etc. Proposed boost converter has been designed and verified in a $0.5\;{\mu}m$ 1-poly 2-metal CMOS process technology. Simulation results show that the output voltage is 4.26 V in 3.7 V input voltage, output current 100 mA which is larger than 25 ~ 50 mA in conventional 500 Khz driven converter when the duty ratio is 0.15.

ZnO nanostructures for e-paper and field emission display applications

  • Sun, X.W.
    • 한국정보디스플레이학회:학술대회논문집
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    • 2008.10a
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    • pp.993-994
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    • 2008
  • Electrochromic (EC) devices are capable of reversibly changing their optical properties upon charge injection and extraction induced by the external voltage. The characteristics of the EC device, such as low power consumption, high coloration efficiency, and memory effects under open circuit status, make them suitable for use in a variety of applications including smart windows and electronic papers. Coloration due to reduction or oxidation of redox chromophores can be used for EC devices (e-paper), but the switching time is slow (second level). Recently, with increasing demand for the low cost, lightweight flat panel display with paper-like readability (electronic paper), an EC display technology based on dye-modified $TiO_2$ nanoparticle electrode was developed. A well known organic dye molecule, viologen, was adsorbed on the surface of a mesoporous $TiO_2$ nanoparticle film to form the EC electrode. On the other hand, ZnO is a wide bandgap II-VI semiconductor which has been applied in many fields such as UV lasers, field effect transistors and transparent conductors. The bandgap of the bulk ZnO is about 3.37 eV, which is close to that of the $TiO_2$ (3.4 eV). As a traditional transparent conductor, ZnO has excellent electron transport properties, even in ZnO nanoparticle films. In the past few years, one-dimension (1D) nanostructures of ZnO have attracted extensive research interest. In particular, 1D ZnO nanowires renders much better electron transportation capability by providing a direct conduction path for electron transport and greatly reducing the number of grain boundaries. These unique advantages make ZnO nanowires a promising matrix electrode for EC dye molecule loading. ZnO nanowires grow vertically from the substrate and form a dense array (Fig. 1). The ZnO nanowires show regular hexagonal cross section and the average diameter of the ZnO nanowires is about 100 nm. The cross-section image of the ZnO nanowires array (Fig. 1) indicates that the length of the ZnO nanowires is about $6\;{\mu}m$. From one on/off cycle of the ZnO EC cell (Fig. 2). We can see that, the switching time of a ZnO nanowire electrode EC cell with an active area of $1\;{\times}\;1\;cm^2$ is 170 ms and 142 ms for coloration and bleaching, respectively. The coloration and bleaching time is faster compared to the $TiO_2$ mesoporous EC devices with both coloration and bleaching time of about 250 ms for a device with an active area of $2.5\;cm^2$. With further optimization, it is possible that the response time can reach ten(s) of millisecond, i.e. capable of displaying video. Fig. 3 shows a prototype with two different transmittance states. It can be seen that good contrast was obtained. The retention was at least a few hours for these prototypes. Being an oxide, ZnO is oxidation resistant, i.e. it is more durable for field emission cathode. ZnO nanotetropods were also applied to realize the first prototype triode field emission device, making use of scattered surface-conduction electrons for field emission (Fig. 4). The device has a high efficiency (field emitted electron to total electron ratio) of about 60%. With this high efficiency, we were able to fabricate some prototype displays (Fig. 5 showing some alphanumerical symbols). ZnO tetrapods have four legs, which guarantees that there is one leg always pointing upward, even using screen printing method to fabricate the cathode.

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HF-Band Magnetic-Field Communication System Using Bias Switching Circuit of Class E Amplifier (E급 증폭기의 바이어스 스위칭 회로를 이용한 HF-대역 자기장 통신 시스템)

  • Son, Yong-Ho;Lee, June;Cho, Sang-Ho;Jang, Byung-Jun
    • The Journal of Korean Institute of Electromagnetic Engineering and Science
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    • v.23 no.9
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    • pp.1087-1093
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    • 2012
  • In this paper, we implemented a HF-band magnetic-field communication system consisting of an amplitude shift keying(ASK) transmitter, a pair of loop antennas, and an ASK receiver. Especially, we suggested a new ASK transmitter architecture, where a drain bias of class E amplifier is switched alternatively between two voltage levels with respect to input data. A maximum 5 W class E amplifier was designed using a low cost IRF510 power MOSFET at the frequency of 6.78 MHz. A measured sensitivity of the designed ASK receiver is -78 dBm, which consists of a log amplifier, a filter, and a comparator. Maximum communication range of magnetic-wave communication system with loop antennas was calculated using magnetic field equations in both near-field and far-field ranges. Also, in order to verify the calculated values, an indoor propagation loss was measured using a pair of loop antennas whose dimensions are $30{\times}30cm$. Maximum operating range is estimated about 35 m in case of transmitter's output power of 1 W and receiver sensitivity of -70 dBm, respectively. Finally, the communication field test using the designed ASK transmitter and receiver was successfully done at the distance of 5 m.

Development of 1.2[kW]Class Fuel Cell Power Conversion System (1.2[kW]급 연료전지용 전력변환장치의 개발)

  • Suh, Ki-Young;Kim, Chil-Ryong;Cho, Man-Chul;Kim, Jung-Do;Yoon, Young-Byun;Kim, Hong-Sin;Park, Do-Hyung;Ha, Sung-Hyun
    • Journal of the Korean Institute of Illuminating and Electrical Installation Engineers
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    • v.21 no.6
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    • pp.117-125
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    • 2007
  • Recently, a fuel cell with low voltage and high current output characteristics is remarkable for new generation system. It needs both a DC-DC step-up converter and DC-AC inverter to be used in fuel cell generation system. Therefor, this paper, consists of an isolated DC-DC converter to boost the fuel cell voltage 380[VDC] and a PWM inverter with LC filter to convent the DC voltage to single-phase 220[VAC]. Expressly, The fuel cell system which it proposes DC-DC the efficient converter used PWM the phase transient control law and it depended to portion resonance ZVS switching, loss peek voltage and electric current of realization under make schedule, switching frequency anger and the switch reduction. And mind benevolence it sprouted 2 in stop circuit and it added and a direct current voltage and the electric current where the ingredient is reduced in load side ripple stable under make whom it will be able to supply. Besides the efficiency of 92[%]is obtained over the wide output voltage regulation ranges and load variations. Also, under make over together the result leads simulation and test, the propriety confirmation.

Design of Low-Area and Low-Power 1-kbit EEPROM (저면적.저전력 1Kb EEPROM 설계)

  • Yu, Yi-Ning;Yang, Hui-Ling;Jin, Li-Yan;Jang, Ji-Hye;Ha, Pan-Bong;Kim, Young-Hee
    • Journal of the Korea Institute of Information and Communication Engineering
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    • v.15 no.4
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    • pp.913-920
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    • 2011
  • In this paper, a logic process based 1-kbit EEPROM IP for RFID tag chips of 900MHz is designed. The cell array of the designed 1-kbit EEPROM IP is arranged in a form of four blocks of 16 rows x 16 columns, that is in a two-dimensional arrangement of one-word EEPROM phantom cells. We can reduce the IP size by making four memory blocks share CG (control gate) and TG (tunnel gate) driver circuits. We propose a TG switch circuit to supply respective TG bias voltages according to operational modes and to keep voltages between devices within 5.5V in terms of reliability in order to share the TG driver circuit. Also, we can reduce the power consumption in the read mode by using a partial activation method to activate just one of four memory blocks. Furthermore, we can reduce the access time by making BL (bit line) switching times faster in the read mode from reduced number of cells connected to each column. We design and compare two 1-kbit EEPROM IPs, two blocks of 32 rows ${\times}$ 16 columns and four blocks of 16 rows ${\times}$ 16 columns, which use Tower's $0.18{\mu}m$ CMOS process. The four-block IP is smaller by 11.9% in the layout size and by 51% in the power consumption in the read mode than the two-block counterpart.

Implementation of AC Direct Driver Circuit for Ultra-slim LED Flat Light System (초슬림 LED 면조명 기구용 교류 직결형 구동 회로 구현)

  • Cho, Myeon-Gyun;Choi, Hyo-Sun;Yoon, Dal-Hwan
    • Journal of the Korea Academia-Industrial cooperation Society
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    • v.13 no.9
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    • pp.4177-4185
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    • 2012
  • LEDs are becoming the most suitable candidate replacing traditional fluorescent lamps because of its eco-friendly characteristics. LEDs are also actively used to design green building system and to make outdoor billboard as a back-light system due to its high energy efficiency. In this paper, we have developed AC direct driver for $12{\times}12$ FLB(flexible LED board) and LED flat light without SMPS. It has LID-PC-R101B driver IC that can support the high power factor and be composed of LED switching circuit in group. Also, an elaborate system designs can guarantee a high luminous efficiency, a high reliability and a low power consumption. The proposed FLB has the ultra slim shape of $450{\times}450$ mm, width of 4 mm and weight of 280 g. In the end, we have developed a prototype of FLB for billboard and flat light for room lighting with AC direct driver iposrder to verify the performance of the proposed system.

One-Chip Multi-Output SMPS using a Shared Digital Controller and Pseudo Relaxation Oscillating Technique (디지털 컨트롤러 공유 및 Pseudo Relaxation Oscillating 기법을 이용한 원-칩 다중출력 SMPS)

  • Park, Young-Kyun;Lim, Ji-Hoon;Wee, Jae-Kyung;Lee, Yong-Keun;Song, Inchae
    • Journal of the Institute of Electronics and Information Engineers
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    • v.50 no.1
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    • pp.148-156
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    • 2013
  • This paper suggests a multi-level and multi-output SMPS based on a shared digital logic controller through independently operating in each dedicated time periods. Although the shared architecture can be devised with small area and high efficiency, it has critical drawbacks that real-time control of each DPWM generators are impossible and its output voltage can be unstable. To solve these problems, a real-time current compensation scheme is proposed as a solution. A current consumption of the core block and entire block with four driver buffers was simulated about 4.9mA and 30mA at 10MHz switching frequency and 100MHz core operating frequency. Output voltage ripple was 11 mV at 3.3V output voltage. Over/undershoot voltage was 10mV/19.6mV at 3.3V output voltage. The noise performance was simulated at 800mA and 100KHz load regulation. Core circuit can be implemented small size in $700{\mu}m{\times}800{\mu}m$ area. For the verification of proposed circuit, the simulations were carried out with Dong-bu Hitek BCD $0.35{\mu}m$ technology.

Design of eFuse OTP IP for Illumination Sensors Using Single Devices (Single Device를 사용한 조도센서용 eFuse OTP IP 설계)

  • Souad, Echikh;Jin, Hongzhou;Kim, DoHoon;Kwon, SoonWoo;Ha, PanBong;Kim, YoungHee
    • Journal of IKEEE
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    • v.26 no.3
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    • pp.422-429
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    • 2022
  • A light sensor chip requires a small capacity eFuse (electrical fuse) OTP (One-Time Programmable) memory IP (Intellectual Property) to trim analog circuits or set initial values of digital registers. In this paper, 128-bit eFuse OTP IP is designed using only 3.3V MV (Medium Voltage) devices without using 1.8V LV (Low-Voltage) logic devices. The eFuse OTP IP designed with 3.3V single MOS devices can reduce a total process cost of three masks which are the gate oxide mask of a 1.8V LV device and the LDD implant masks of NMOS and PMOS. And since the 1.8V voltage regulator circuit is not required, the size of the illuminance sensor chip can be reduced. In addition, in order to reduce the number of package pins of the illumination sensor chip, the VPGM voltage, which is a program voltage, is applied through the VPGM pad during wafer test, and the VDD voltage is applied through the PMOS power switching circuit after packaging, so that the number of package pins can be reduced.

A Study on the ISDN Telephone User-Network Interface Part2: A Study on the ISDN User Terminal; Digital Telephone (ISDN용 전화가입자 - 망 간 접속에 관한 연구 제 2 부 : ISDN용 가입자 단말장치-Digital Telethone-에 관한 연구)

  • 옥승수;김선형;김영철;조규섭;박병철
    • The Journal of Korean Institute of Communications and Information Sciences
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    • v.12 no.1
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    • pp.71-81
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    • 1987
  • To fuly utilize the availability of the ISDN, it is very important to develop the ISDN user terminals which can provide various user services. In this paper, the basic concept of the ISDN user terminal is briefly studied and, based on this study, a stimulus type digital telephone which can be connected directly to the ISDN is designed. This digital telephone can provide the basic voice service and has general functions such as voice encoding / decoding(PCM is used), user-network signalling, digital tone supply, channel selection, key pad and atatus display. Echo cancellation method is adopted for the digital subscirber loop transmission and user-network signalling is implemented according to the LAPD(Link Access Procedure on D-channel) protocol recommended by the CCITT's recommendations I.440-I.441. The validity of designed S/W and H/W functions are verified by testing them with ISDN circuit switching emulator described in the first part of this paper.

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