• Title/Summary/Keyword: Switching Transistor

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Device Suitability Analysis by Comparing Performance of SiC MOSFET and GaN Transistor in Induction Heating System (유도 가열 시스템에서 SiC MOSFET과 GaN Transistor의 성능 비교를 통한 소자 적합성 분석)

  • Cha, Kwang-Hyung;Ju, Chang-Tae;Min, Sung-Soo;Kim, Rae-Young
    • The Transactions of the Korean Institute of Power Electronics
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    • v.25 no.3
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    • pp.204-212
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    • 2020
  • In this study, device suitability analysis is performed by comparing the performance of SiC MOSFET and GaN Transistor, which are WBG power semiconductor devices in the induction heating (IH) system. WBG devices have the advantages of low conduction resistance, switching losses, and fast switching due to their excellent physical properties, which can achieve high output power and efficiency in IH systems. In this study, SiC and GaN are applied to a general half-bridge series resonant converter topology to compare the conduction loss, switching loss, reverse conduction loss, and thermal performance of the device in consideration of device characteristics and circuit conditions. On this basis, device suitability in the IH system is analyzed. A half-bridge series resonant converter prototype using the SiC and GaN of a 650-V rating is constructed to verify device suitability through performance comparison and verified through an experimental comparison of power loss and thermal performance.

A study on the switching character of MOS-GTO and the design of gate drive circuit (MOS-GTO의 스위칭 특성과 Gate Drive 회로 설계에 관한 연구)

  • Roh, Jin-Eep;Seong, Se-Jin
    • Proceedings of the KIEE Conference
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    • 1991.11a
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    • pp.231-233
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    • 1991
  • This paper discribes a study on the switching character of MOS-GTO and the design of gate drive circuit. Chopping power supply converter, synchronious and asyncronious motor speed adjustment, inverter, etc., needs low drive energy "high frequency" switches. To fulfill these need, switches must have rapid switching time and insulated gate control. MOS-GTO structure is well suited to these constraints. The power switch is serial installation of a GTO thyrister and a MOS Transistor. The gate of the GTO is linked to positive pole of the cascode structure via a MOS high voltage transistor and ground via a transient absorber diode. This high performance MOS-GTO assembly considerably increases the strength which facilitate the drive of GTO thyristers.

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A Study on the Design of a Pulse-Width Modulation DC/DC Power Converter

  • Lho, Young-Hwan
    • International Journal of Aeronautical and Space Sciences
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    • v.11 no.3
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    • pp.201-205
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    • 2010
  • DC/DC Switching power converters are commonly used to generate regulated DC output voltages with high-power efficiencies from different DC input sources. A switching converter utilizes one or more energy storage elements such as capacitors, or transformers to efficiently transfer energy from the input to the output at periodic intervals. The fundamental boost converter studied here consists of a power metal-oxide semiconductor field effect transistor switch, an inductor, a capacitor, a diode, and a pulse-width modulation circuit with oscillator, amplifier, and comparator. A buck converter containing a switched-mode power supply is also studied. In this paper, the electrical characteristics of DC/DC power converters are simulated by simulation program with integrated circuit emphasis (SPICE). Furthermore, power efficiency was analyzed based on the specifications of each component.

New Modeling of Switching Devices Considering Power Loss in Electromagnetic Transients Program Simulation

  • Kim, Seung-Tak;Park, Jung-Wook;Baek, Seung-Mook
    • Journal of Electrical Engineering and Technology
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    • v.11 no.3
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    • pp.592-601
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    • 2016
  • This paper presents the modeling of insulated-gate bipolar transistor (IGBT) in electromagnetic transients program (EMTP) simulation for the reliable calculation of switching and conduction losses. The conventional approach considering the physical property of switching devices requires many attribute parameters and large computation efforts. In contrast, the proposed method uses the curve fitting and interpolation techniques based on typical switching waveforms and a user-defined component with variable resistances to capture the dynamic characteristics of IGBTs. Therefore, the simulation time can be efficiently reduced without losing the accuracy while avoiding the extremely small time step, which is required in simulation by the conventional method. The EMTP based simulation includes turn-on and turn-off transients of IGBT, saturation state, forward voltage of free-wheeling diode, and reverse recovery characteristics, etc. The effectiveness of proposed modeling for the EMTP simulation is verified by the comparison with experimental results obtained from practical implementation in hardware.

Design of Parasitic Inductance Reduction in GaN Cascode FET for High-Efficiency Operation

  • Chang, Woojin;Park, Young-Rak;Mun, Jae Kyoung;Ko, Sang Choon
    • ETRI Journal
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    • v.38 no.1
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    • pp.133-140
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    • 2016
  • This paper presents a method of parasitic inductance reduction for high-speed switching and high-efficiency operation of a cascode structure with a low-voltage enhancement-mode silicon (Si) metal-oxide-semiconductor field-effect transistor (MOSFET) and a high-voltage depletion-mode gallium nitride (GaN) fielde-ffect transistor (FET). The method is proposed to add a bonding wire interconnected between the source electrode of the Si MOSFET and the gate electrode of the GaN FET in a conventional cascode structure package to reduce the most critical inductance, which provides the major switching loss for a high switching speed and high efficiency. From the measured results of the proposed and conventional GaN cascode FETs, the rising and falling times of the proposed GaN cascode FET were up to 3.4% and 8.0% faster than those of the conventional GaN cascode FET, respectively, under measurement conditions of 30 V and 5 A. During the rising and falling times, the energy losses of the proposed GaN cascode FET were up to 0.3% and 6.7% lower than those of the conventional GaN cascode FET, respectively.

Improvement of Switching Speed of a 600-V Nonpunch-Through Insulated Gate Bipolar Transistor Using Fast Neutron Irradiation

  • Baek, Ha Ni;Sun, Gwang Min;Kim, Ji suck;Hoang, Sy Minh Tuan;Jin, Mi Eun;Ahn, Sung Ho
    • Nuclear Engineering and Technology
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    • v.49 no.1
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    • pp.209-215
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    • 2017
  • Fast neutron irradiation was used to improve the switching speed of a 600-V nonpunch-through insulated gate bipolar transistor. Fast neutron irradiation was carried out at 30-MeV energy in doses of $1{\times}10^8n/cm^2$, $1{\times}10^9n/cm^2$, $1{\times}10^{10}n/cm^2$, and $1{\times}10^{11}n/cm^2$. Electrical characteristics such as current-voltage, forward on-state voltage drop, and switching speed of the device were analyzed and compared with those prior to irradiation. The on-state voltage drop of the initial devices prior to irradiation was 2.08 V, which increased to 2.10 V, 2.20 V, 2.3 V, and 2.4 V, respectively, depending on the irradiation dose. This effect arises because of the lattice defects generated by the fast neutrons. In particular, the turnoff delay time was reduced to 92 nanoseconds, 45% of that prior to irradiation, which means there is a substantial improvement in the switching speed of the device.

A Technique for Full Wave Rectification using a Single Transistor (Single Transistor에 의한 전파정류 Technique)

  • 이주근;이동근
    • Journal of the Korean Institute of Telematics and Electronics
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    • v.15 no.3
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    • pp.7-10
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    • 1978
  • A method of full wave rectification is proposed which is accomplished by an inverter circuit including R-feed back. Both halves of the input cycle can be presented in the out put by composing a conductive half cycle and an inactive half cycle substituted by feed back in the cut off state.

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Electrical Properties of Local Bottom-Gated MoS2 Thin-Film Transistor

  • Kwon, Junyeon;Lee, Youngbok;Song, Wongeun;Kim, Sunkook
    • Proceedings of the Korean Vacuum Society Conference
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    • 2014.02a
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    • pp.375-375
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    • 2014
  • Layered semiconductor materials can be a promising candidate for large-area thin film transistors (TFTs) due to their relatively high mobility, low-power switching, mechanically flexibility, optically transparency, and amenability to a low-cost, large-area growth technique like thermal chemical vapor deposition (CVD). Unlike 2D graphene, series of transition metal dichalcogenides (TMDCs), $MX_2$ (M=Ta, Mo, W, X=S, Se, Te), have a finite bandgap (1~2 eV), which makes them highly attractive for electronics switching devices. Recently, 2D $MoS_2$ materials can be expected as next generation high-mobility thin-film transistors for OLED and LCD backplane. In this paper, we investigate in detail the electrical characteristics of 2D layered $MoS_2$ local bottom-gated transistor with the same device structure of the conventional thin film transistor, and expect the feasibility of display application.

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Investigation of Junction-less Tunneling Field Effect Transistor (JL-TFET) with Floating Gate

  • Ali, Asif;Seo, Dongsun;Cho, Il Hwan
    • JSTS:Journal of Semiconductor Technology and Science
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    • v.17 no.1
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    • pp.156-161
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    • 2017
  • This work presents a novel structure for junction-less tunneling field effect transistor (JL-TFET) with a floating gate over the source region. Introduction of floating gate instead of fixed metal gate removes the limitation of fabrication process suitability. The proposed device is based on a heavily n-type-doped Si-channel junction-less field effect transistor (JLFET). A floating gate over source region and a control-gate with optimized metal work-function over channel region is used to make device work like a tunnel field effect transistor (TFET). The proposed device has exhibited excellent ID-VGS characteristics, ION/IOFF ratio, a point subthreshold slope (SS), and average SS for optimized device parameters. Electron charge stored in floating gate, isolation oxide layer and body doping concentration are optimized. The proposed JL-TFET can be a promising candidate for switching performances.

Characteristics of RC circuit with Transistor in Micro-EDM (트랜지스터 부착 RC 방전회로의 마이크로 방전가공 특성)

  • 조필주;이상민;최덕기;주종남
    • Proceedings of the Korean Society of Precision Engineering Conference
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    • 2002.10a
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    • pp.235-240
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    • 2002
  • In micro-EBM, it is well blown that RC circuit is suitable for discharge circuit because of its low pulse width and relatively high peak current. To increase machining speed without changing unit discharge energy, charge resistance should be decreased. But, if very low, continuous (or normal) arc discharge occurs, then increases electrode wear and reduces machining speed remarkably. In this paper, RC circuit with transistor is used to micro-EDM. Experimental results show that RC circuit with transistor can cut off continuous (or normal) arc discharge effectively if duty factor and switching period of transistor are set up optimally. Through experiments with varying charge resistance, it can be known that RC circuit with transistor has about two times faster machining speed than that of RC circuit. Especially, it has prominent rise-effect of machining speed in low unit discharge energy, so that a high-quality and high-speed micro-EDM can be realized through RC circuit with transistor.

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