• Proceedings of the Korean Society of Precision Engineering Conference
• /
• 2002.10a
• /
• pp.530-535
• /
• 2002

Pneumatic control system has been applied to build many industrial automation systems. But most of them are sequence control type because of their low costs, safety, reliability, etc. Pneumatic servo system is rarely applied to real industrial fields because accurate position control is very difficult due to its nonlinearity and compressibility of air. In pneumatic servo control system, a pneumatic servo valve can be applied, But it is very expensive and has no advantage of low cost compared with a common pneumatic system. This paper is concerned with the accurate position control of a rodless pneumatic cylinder using on/off solenoid valve. A novel Intelligent Modified Pulse Width Modulation(MPWM) is newly proposed. The control performance of this pneumatic cylinder depends on the external loads. To overcome this problem, switching of control parameter using artificial neural network is newly proposed, which estimates external loads on rodless pneumatic cylinder using this training neural network. As an underlying controller, a state feedback controller using position, velocity and acceleration is applied in the switching control the system. The effectiveness of the proposed control algorithms are demonstrated through experiments nth various loads.

• Journal of KIISE:Computing Practices and Letters
• /
• v.6 no.6
• /
• pp.628-634
• /
• 2000

We propose a data coding scheme for reducing' power consumption and ElVII in transmitting a sequence of data from LCD controller to LCD driver. The proposed coding scheme makes use of reducing data transitions in general text image of PC. It can be implemented with a little hardware and applied to the real-time applications of LCD driving system. We have executed computer simulations of the proposed coding scheme and compared the results of the proposed scheme with those produced by the existing coding schemes. The proposed coding scheme, compared to the existing ones, reduces the switching activity significantly in both of text and picture images.

• The Transactions of the Korean Institute of Power Electronics
• /
• v.27 no.2
• /
• pp.165-173
• /
• 2022

The electrification trend of mobility increases every year due to the development of power semiconductor and battery technology. Accordingly, the development and distribution of fast chargers for electric vehicles (EVs) are in demand. In this study, we propose a design and implementation method of an LLC converter for fast chargers. Two 15 kW LLC converters are configured in parallel to have 30 kW rated output power, and the control algorithm and driving sequence are designed accordingly and verified. In addition, the improved power conversion efficiency is confirmed through zero-voltage switching (ZVS) of the LLC converter and reduction of turn-off loss through snubber capacitors. The implemented 30 kW LLC converters show a wide output voltage range of 200-950 V. Experiments applying various load conditions verify the converter performance.

• Journal of IKEEE
• /
• v.20 no.3
• /
• pp.251-259
• /
• 2016

This paper describes that how to enhance the robustness of semiconductor TRM(Transmitter and Receiver Module) through the bias sequencing and tuning the switching time. Previous circuit designs focused on improving the MDS(Minimum Detection Signal) performance. Because TRM has critical problem which transmission output signal leak into receiver by it's compact design. Under this condition, TRM was frequently broken down within the MTBF(Mean Time Between Failure). This study proposes the bias sequencing and tuning the switching time to improve above problem. At first, we collected major failure symptom and infer it's cause. Second, we demonstrated it's effect by derive the improvement method and apply it to our system. And finally we can convinced that the proposed method clear the frequent failure problem with its lack of isolation.

• Journal of Power Electronics
• /
• v.15 no.1
• /
• pp.190-201
• /
• 2015

This paper uses the switching function approach to present a simple state model of the Vienna-type rectifier. The approach introduces the relationship between the DC-link neutral point voltage and the AC side phase currents. A novel direct power control (DPC) strategy, which is based on the sliding mode control (SMC) for Vienna I rectifiers, is developed using the proposed power model in the stationary ${\alpha}-{\beta}$ reference frames. The SMC-based DPC methodology directly regulates instantaneous active and reactive powers without transforming to a synchronous rotating coordinate reference frame or a tracking phase angle of grid voltage. Moreover, the required rectifier control voltages are directly calculated by utilizing the non-linear SMC scheme. Theoretically, active and reactive power flows are controlled without ripple or cross coupling. Furthermore, the fixed-switching frequency is obtained by employing the simplified space vector modulation (SVM). SVM solves the complicated designing problem of the AC harmonic filter. The simplified SVM is based on the simplification of the space vector diagram of a three-level converter into that of a two-level converter. The dwelling time calculation and switching sequence selection are easily implemented like those in the conventional two-level rectifier. Replacing the current control loops with power control loops simplifies the system design and enhances the transient performance. The simulation models in MATLAB/Simulink and the digital signal processor-controlled 1.5 kW Vienna-type rectifier are used to verify the fast responses and robustness of the proposed control scheme.

• Korean Journal of Optics and Photonics
• /
• v.27 no.6
• /
• pp.212-217
• /
• 2016

In connection-oriented data-transport services, data loss can occur when the service experiences a problem on its end-to-end path. To promptly resolve this problem, the data-switching systems providing the service should quickly modify their internal configurations distributed among different places in each system. This is performed through a sequence of problem (event) recognition, sharing, and handling procedures among multiple control processors in the system. This paper proposes a method for event sharing and messaging between control processors, to improve the time determinacy of event processing. This method simplifies runtime event sharing and minimizes the time variability caused by the event data, resulting in a decrease in the latency time in processing global events. The proposed method lessens the latency time of global event processing by about 40%, compared to general methods, for 738 internal path changes.

• Journal of international Conference on Electrical Machines and Systems
• /
• v.1 no.1
• /
• pp.32-39
• /
• 2012

With the aid of genetic algorithm (GA), global optimization with multiple geometry parameters is feasible in the design of switched flux permanent magnet (SFPM) machines. To investigate the advantages of global optimization over individual optimization, which has been used extensively for the design of SFPM machines, a comparison between the two approaches is carried out for the case of fixed copper loss and volume. In the case of individual parameter optimization, the sequence in which the individual parameters are optimized is very important. In the global optimization a better design can always be achieved although the corresponding torque density is found to be only slightly better than that of individually optimized with correct design sequence. By using the obtained global optimization results, the performance in machines having two types of stator and rotor pole combinations, i.e. 12/10 and 12/14, are compared, and it is shown that higher torque is exhibited in the 12/14 SFPM machine. Finally, this paper also demonstrates that global optimization, with the restriction of equal pole width, magnet thickness and slot opening, can maximize the torque density without significantly sacrificing other performance, such as cogging torque and overload capability.

• Journal of KIISE
• /
• v.42 no.6
• /
• pp.748-754
• /
• 2015

This paper proposes a sequential state estimation model consisting of continuous and discrete variables, as a way of generalizing all discrete-state factorial HMM, and gives a design of gait motion model based on the idea. The discrete state variable implements a Markov chain that models the gait dynamics, and for each state of the Markov chain, we created a Gaussian process over the space of the continuous variable. The Markov chain controls the switching among Gaussian processes, each of which models the rotation or various views of a gait state. Then a particle filter-based algorithm is presented to give an approximate filtering solution. Given an input vector sequence presented over time, this finds a trajectory that follows a Gaussian process and occasionally switches to another dynamically. Experimental results show that the proposed model can provide a very intuitive interpretation of video-based gait into a sequence of poses and a sequence of posture states.

• Journal of the Institute of Electronics Engineers of Korea TC
• /
• v.41 no.9
• /
• pp.73-80
• /
• 2004

In this paper, we present the cell resequencing buffer to solve the cell sequence integrity problem of the Cyclic banyan network that is a high-performance fault-tolerant cell switch. By offering multiple paths between input ports and output ports, using the deflection self-routing, the Cyclic banyan switch offer high reliability, and it also solves congestion problem for the internal links of the switch. By the way, these multiple paths can be different lengths for each other. Therefore, the cells departing from an identical source port and arriving at an identical destination port can reach to the output port as the order that is different from the order arriving at input port. The proposed cell resequencing buffer is a hardware sliding window mechanism. to solve such cell sequence integrity problem. To calculate the size of sliding window that cause the prime cost of the presented device, we analyzed the distribution of the cell delay through the simulation analyses under traffic load that have a nonuniform address distribution that express tile Property of traffic of the Internet. Through these analyses, we found out that we can make a cell resequencing buffer by which the cell sequence integrity is to be secured, by using a, few of ordinary memory and control logic. The cell resequencing buffer presented in this paper can be used for other multiple paths switching networks.

• Journal of information and communication convergence engineering
• /
• v.5 no.2
• /
• pp.131-135
• /
• 2007

In this paper, The proposed algorithm consists of three steps. In the first step, TD(Transition Density) calculation has to be performed. a CLB-based CPLD low-power technology mapping algorithm considered a Trade-off is proposed. To perform low-power technology mapping for CPLDs, a given Boolean network has to be represented in a DAG. Total power consumption is obtained by calculating the switching activity of each node in a DAG. In the second step, the feasible clusters are generated by considering the following conditions: the number of inputs and outputs, the number of OR terms for CLB within a CPLD. The common node cluster merging method, the node separation method, and the node duplication method are used to produce the feasible clusters. In the final step, low-power technology mapping based on the CLBs packs the feasible clusters. The proposed algorithm is examined using SIS benchmarks. When the number of OR terms is five, the experiment results show that power consumption is reduced by 30.73% compared with TEMPLA, and by 17.11 % compared with PLA mapping.