• 한국전기전자재료학회논문지
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• 제33권2호
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• pp.109-113
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• 2020

A power device is a component used as a switch or rectifier in power electronics to control high voltages. Consequently, power devices are used to improve the efficiency of electric-vehicle (EV) chargers, new energy generators, welders, and switched-mode power supplies (SMPS). Power device designs, which require high voltage, high efficiency, and high reliability, are typically based on MOSFET (metal-oxide-semiconductor field-effect transistor) and IGBT (insulated-gate bipolar transistor) structures. As a unipolar device, a MOSFET has the advantage of relatively fast switching and low tail current at turn-off compared to IGBT-based devices, which are built on bipolar structures. A superjunction structure adds a p-base region to allow a higher yield voltage due to lower R_DS (on) and field dispersion than previous p-base components, significantly reducing the total gate charge. To verify the basic characteristics of the superjunction, we worked with a planar type MOSFET and Synopsys' process simulation T-CAD tool. A basic structure of the superjunction MOSFET was produced and its changing electrical characteristics, tested under a number of environmental variables, were analyzed.

• ETRI Journal
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• 제34권6호
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• pp.962-965
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• 2012

In this letter, we propose a new RESURF stepped oxide (RSO) process to make a semi-superjunction (semi-SJ) trench double-diffused MOSFET (TDMOS). In this new process, the thick single insulation layer ($SiO_2$) of a conventional device is replaced by a multilayered insulator ($SiO_2/SiN_x/TEOS$) to improve the process and electrical properties. To compare the electrical properties of the conventional RSO TDMOS to those of the proposed TDMOS, that is, the nitride_RSO TDMOS, simulation studies are performed using a TCAD simulator. The nitride_RSO TDMOS has superior properties compared to those of the RSO TDMOS, in terms of drain current and on-resistance, owing to a high nitride permittivity. Moreover, variations in the electrical properties of the nitride_RSO TDMOS are investigated using various devices, pitch sizes, and thicknesses of the insulator. Along with an increase of the device pitch size and the thickness of the insulator, the breakdown voltage slowly improves due to a vertical field plate effect; however, the drain current and on-resistance degenerate, owing to a shrinking of the drift width. The nitride_RSO TDMOS is successfully fabricated, and the blocking voltage and specific on-resistance are 108 V and $1.1m{\Omega}cm^2$, respectively.

• ETRI Journal
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• 제35권4호
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• pp.632-637
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• 2013

In this paper, we propose a superjunction trench gate MOSFET (SJ TGMOSFET) fabricated through a simple p-pillar forming process using deep trench and boron silicate glass doping process technology to reduce the process complexity. Throughout the various boron doping experiments, as well as the process simulations, we optimize the process conditions related with the p-pillar depth, lateral boron doping concentration, and diffusion temperature. Compared with a conventional TGMOSFET, the potential of the SJ TGMOSFET is more uniformly distributed and widely spread in the bulk region of the n-drift layer due to the trenched p-pillar. The measured breakdown voltage of the SJ TGMOSFET is at least 28% more than that of a conventional device.

• 전기전자학회논문지
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• 제23권3호
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• pp.832-838
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• 2019

본 논문에서는 차세대 전력 반도체 소자인 4H-SiC MOSFET에 대해 연구하였다. 특히 3300V급에서 기존의 DMOSFET 구조보다 개선된 전기적 특성을 갖는 Semi-SuperJunction MOSFET 구조를 제안하였으며, TCAD 시뮬레이션을 통해 기존의 MOSFET과 전기적 특성을 비교 분석하였다. Semi-SJ MOSFET 구조는 부분적으로 SJ를 도입한 구조로, 2차원의 공핍 효과를 통해 전계 분포가 개선되며, 항복 전압이 증가한다. 항복 전압의 개선을 통해 얻은 이득으로, 높은 농도의 도핑이 가능하기 때문에 온 저항을 개선시킬 수 있다. 제안한 Semi-SJ MOSFET 구조는 DMOSFET보다 항복 전압이 8% 감소하지만, 온 저항이 80% 감소한다. 또한 DMOSFET 구조를 개선한 Current Spreading Layer(CSL)구조에 비해서도 온 저항이 44% 감소한다.

• ETRI Journal
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• 제36권5호
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• pp.829-834
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• 2014

In this paper, a lateral power metal-oxide-semiconductor field-effect transistor with ultra-low specific on-resistance is proposed to be applied to a high-voltage (up to 200 V) integrated chip. The proposed structure has two characteristics. Firstly, a high level of drift doping concentration can be kept because a tilt-implanted p-drift layer assists in the full depletion of the n-drift region. Secondly, charge imbalance is avoided by an extended trench gate, which suppresses the trench corner effect occurring in the n-drift region and helps achieve a high breakdown voltage (BV). Compared to a conventional trench gate, the simulation result shows a 37.5% decrease in $R_{on.sp}$ and a 16% improvement in BV.

• 한국전기전자재료학회논문지
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• 제30권6호
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• pp.345-348
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• 2017

In this work, static characteristics of 4H-SiC SJ-ACCUFETs were obtained by adjusting the p-pillar region. The structure of this SJ-ACCUFET was designed by using a two-dimensional simulator. The static characteristics of SJ-ACCUFET, such as the breakdown voltages, on-resistance, and figure of merits, were obtained by varying the p-pillar doping concentration from $1{\times}10^{15}cm^{-3}$ to $5{\times}10^{16}cm^{-3}$ and the thickness from $0{\mu}m$ to $9{\mu}m$. The doping concentration and the thickness of p-pillar region are closely related to the break down voltage and on-resistance and threshold voltages. Hence a silicon carbide SJ-ACCUFET structure with highly intensified breakdown voltages and low on-resistances with good figure of merits can be achieved by optimizing the p-pillar thickness and doping concentration.

• ETRI Journal
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• 제35권3호
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• pp.425-430
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• 2013

In this paper, we propose a triple-gate trench power MOSFET (TGRMOS) that is made through a modified RESURF stepped oxide (RSO) process, that is, the nitride_RSO process. The electrical characteristics of TGRMOSs, such as the blocking voltage ($BV_{DS}$) and on-state current ($I_{D,MAX}$), are strongly dependent on the gate configuration and its bias condition. In the nitride_RSO process, the thick single insulation layer ($SiO_2$) of a conventional RSO power MOSFET is changed to a multilayered insulator ($SiO_2/SiN_x/TEOS$). The inserted $SiN_x$ layer can create the selective etching of the TEOS layer between the gate oxide and poly-Si layers. After additional oxidation and the poly-Si filling processes, the gates are automatically separated into three parts. Moreover, to confirm the variation in the electrical properties of TGRMOSs, such as $BV_{DS}$ and $I_{D,MAX}$, simulation studies are performed on the function of the gate configurations and their bias conditions. $BV_{DS}$ and $I_{D,MAX}$ are controlled from 87 V to 152 V and from 0.14 mA to 0.24 mA at a 15-V gate voltage. This $I_{D,MAX}$ variation indicates the specific on-resistance modulation.