• Title/Summary/Keyword: Substrate bias voltage

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The Study on Characteristics of a-C:H Films Deposited by ECR Plasma (전자회전공명 플라즈마를 이용한 a-C:H 박막의 특성 연구)

  • 김인수;장익훈;손영호
    • Proceedings of the Korea Society for Industrial Systems Conference
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    • 2001.05a
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    • pp.224-231
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    • 2001
  • Hydrogenated amorphous carbon films were deposited by ERC-PECVD with deposition conditions, such as ECR power, gas composition of methane and hydrogen, deposition time, and substrate bias voltage. The characteristics of the film were analyzed using the AES, ERDA, FTIR. Raman spectroscopy and micro hardness tester. From the results of AES and ERDA, the elements in the deposited film were confirmed as carbon and hydrogen atoms. FTIR spectroscopy analysis shows that the atomic bonding structure of a-C:H film consisted of sp³and sp²bonding, most of which is composed of sp³bonding. The structure of the a-C:H films changed from CH₃bonding to CH₂or CH bonding as deposition time increased. We also found that the amount of dehydrogenation in a-C:H films was increased as the bias voltage increased. Raman scattering analysis shows that integrated intensity ratio (I/sub D//I/sub G/) of the D and G peak was increased as the substrate bias voltage increased, and films hardness was increased.

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Characterization of step-edge dc SQUID magnetometer fabricated on sapphire substrate (사파이어 기판 위에 제작된 step-edge dc SQUID magnetometer의 특성)

  • 임해용;박종혁;정구락;한택상;김인선;박용기
    • Proceedings of the Korea Institute of Applied Superconductivity and Cryogenics Conference
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    • 2002.02a
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    • pp.127-130
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    • 2002
  • Step-edge dc SQUID magnetometers have been fabricated on sapphire substrate. Ce$O_{2}$ buffer layer and $YBa_{2}$$Cu_{3}$ $O_{7}$(YBCO) films were deposited in-situ on the low angle (~$35^{\circ}$)steps formed on the substrates. Typical 5-$\mu$m-wide junction has $R_{N}$ of 4 $\Omega$ and $I_{c}$ of 60 $\mu$A with $I_{c}$$R_{N}$ product of 240 $\mu$V at 77 K. According to applied bias current, depth of voltage modulation was changed and maximum voltage was measured 100~300 fT/$\checkmark$ Hz at 100 Hz, and about 1.5 pT/$\checkmark$ Hz at 1 Hz. For ac bias reversal method, field noise was decreased in the 1/f region. The QRS peak of magneto-cardiogram was measured 50 pT in the magnetically shielded room.

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A Study on Formation and Evaluation of he Thin Films for Improvement of Tribology Properties (Tribology특성 향상을 위한 Ag 박막의 형성과 평가에 관한 연구)

  • 이경황;이상기;송복한;정병진;박창남;문경만;이명훈
    • Journal of the Korean institute of surface engineering
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    • v.33 no.5
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    • pp.319-328
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    • 2000
  • Silver is known to have such characteristics as low shear strength, good transfer-film forming tendency, and good corrosion resistance. Silver thin films have been prepared by ion plating of physical vapour deposition (PVD) using both argon gas pressure and bias voltage of processing condition. After the silver films were prepared, the properties in them were examined by gas pressure and bias voltage of substrate. Their morphology and crystal orientation were investigated by scanning electron microscopy (SEM) and X-ray diffractor. The properties of film were, also, studied to relate with morphology, X-ray diffraction pattern, and friction coefficient at vacuum ambient. The friction coefficient was stabilized remarkably on deposited films with increasing argon pressure for deposition. Also, the effect of increasing of the bias voltage for deposition resulted in lower friction coefficient and stability in $1.7$\times$10^{-4}$ torr. On the contrary, behavior of friction coefficient was stabilized on deposited films with decreasing the bias voltage in $1.7$\times$10^{-5}$ torr for deposition.

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A New Method for Extracting Interface Trap Density in Short-Channel MOSFETs from Substrate-Bias-Dependent Subthreshold Slopes

  • Lyu, Jong-Son
    • ETRI Journal
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    • v.15 no.2
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    • pp.11-25
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    • 1993
  • Interface trap densities at gate oxide/silicon substrate ($SiO_2/Si$) interfaces of metal oxide semiconductor field-effect transistors (MOSFETs) were determined from the substrate bias dependence of the subthreshold slope measurement. This method enables the characterization of interface traps residing in the energy level between the midgap and that corresponding to the strong inversion of small size MOSFET. In consequence of the high accuracy of this method, the energy dependence of the interface trap density can be accurately determined. The application of this technique to a MOSFET showed good agreement with the result obtained through the high-frequency/quasi-static capacitance-voltage (C-V) technique for a MOS capacitor. Furthermore, the effective substrate dopant concentration obtained through this technique also showed good agreement with the result obtained through the body effect measurement.

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Extraction of Bias and Gate Length dependent data of Substrate Parameters for RF CMOS Devices (RF CMOS 소자 기판 파라미터의 바이어스 및 게이트 길이 종속데이터 추출)

  • Lee, Yong-Taek;Choi, Mun-Sung;Lee, Seong-Hearn
    • Proceedings of the IEEK Conference
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    • 2004.06b
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    • pp.347-350
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    • 2004
  • The substrate parameters of Si MOSFET equivalent circuit model were directly extracted from measured S-Parameters in the GHz region by using simple 2-port parameter equations. Using the above extract ion method, bias and gate length dependent curves of substrate parameters in the RF region are obtained by varying drain voltage at several short channel devices with various gate lengths. These extract ion data will greatly contribute to scalable RF nonlinear substrate modeling.

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The gate delay time and the design of VCO using variable MOS capacitance

  • Ryeo, Ji-Hwan
    • Proceedings of the Korea Society of Information Technology Applications Conference
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    • 2005.11a
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    • pp.99-102
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    • 2005
  • In the paper, a proposed VCO based on bondwire inductances and nMOS varactors was implemented in a standard $0.25\;{\mu}m$ CMOS process. Using the new drain current model and a propagation delay time model equations, the operation speed of CMOS gate will predict the dependence on the load capacitance and the depth of oxide, threshold voltage, the supply voltage, the channel length. This paper describes the result of simulation which calculated a gate propagation delay time by using new drain current model and a propagation delay time model. At the result, When the reverse bias voltage on the substrate changes from 0 voltage to 3 voltage, the propagation delay time is appeared the delay from 0.8 nsec to 1 nsec. When the reverse voltage is biased on the substrate, for reducing the speed delay time, a supply voltage has to reduce. The $g_m$ value of MOSFET is calculated by using new drain current model.

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Fabrication and Electrical Transport Characteristics of All-Perovskite Oxide DyMnO3/Nb-1.0 wt% Doped SrTiO3 Heterostructures

  • Wang, Wei Tian
    • Korean Journal of Materials Research
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    • v.30 no.7
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    • pp.333-337
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    • 2020
  • Orthorhombic DyMnO3 films are fabricated epitaxially on Nb-1.0 wt%-doped SrTiO3 single crystal substrates using pulsed laser deposition technique. The structure of the deposited DyMnO3 films is studied by X-ray diffraction, and the epitaxial relationship between the film and the substrate is determined. The electrical transport properties reveal the diodelike rectifying behaviors in the all-perovskite oxide junctions over a wide temperature range (100 ~ 340 K). The forward current is exponentially related to the forward bias voltage, and the extracted ideality factors show distinct transport mechanisms in high and low positive regions. The leakage current increases with increasing reverse bias voltage, and the breakdown voltage decreases with decrease temperature, a consequence of tunneling effects because the leakage current at low temperature is larger than that at high temperature. The determined built-in potentials are 0.37 V in the low bias region, and 0.11 V in the high bias region, respectively. The results show the importance of temperature and applied bias in determining the electrical transport characteristics of all-perovskite oxide heterostructures.

Effect of DC Bias on the Growth of Nanocrystalline Diamond Films by Microwave Plasma CVD (마이크로웨이브 플라즈마 CVD에 의한 나노결정질 다이아몬드 박막 성장 시 DC 바이어스 효과)

  • Kim, In-Sup;Kang, Chan Hyoung
    • Journal of the Korean institute of surface engineering
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    • v.46 no.1
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    • pp.29-35
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    • 2013
  • The effect of DC bias on the growth of nanocrystalline diamond films on silicon substrate by microwave plasma chemical vapor deposition has been studied varying the substrate temperature (400, 500, 600, and $700^{\circ}C$), deposition time (0.5, 1, and 2h), and bias voltage (-50, -100, -150, and -200 V) at the microwave power of 1.2 kW, working pressure of 110 torr, and gas ratio of Ar/1%$CH_4$. In the case of low negative bias voltages (-50 and -100 V), the diamond particles were observed to grow to thin film slower than the case without bias. Applying the moderate DC bias is believed to induce the bombardment of energetic carbon and argon ions on the substrate to result in etching the surfaces of growing diamond particles or film. In the case of higher negative voltages (-150 and -200 V), the growth rate of diamond film increased with the increasing DC bias. Applying the higher DC bias increased the number of nucleation sites, and, subsequently, enhanced the film growth rate. Under the -150 V bias, the height (h) of diamond films exhibited an $h=k{\sqrt{t}}$ relationship with deposition time (t), where the growth rate constant (k) showed an Arrhenius relationship with the activation energy of 7.19 kcal/mol. The rate determining step is believed to be the surface diffusion of activated carbon species, but the more subtle theoretical treatment is required for the more precise interpretation.

Optimization of tetrahedral amorphous carbon (ta-C) film deposited with filtered cathodic vacuum arc through Taguchi robust design (다구찌 강건 설계를 통한 자장 여과 아크 소스로 증착된 사면체 비정질 탄소막의 최적화)

  • Kwak, Seung-Yun;Jang, Young-Jun;Ryu, Hojun;Kim, Jisoo;Kim, Jongkuk
    • Journal of the Korean institute of surface engineering
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    • v.54 no.2
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    • pp.53-61
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    • 2021
  • The properties of tetrahedral amorphous Carbon (ta-C) film can be determined by multiple parameters and comprehensive effects of those parameters during a deposition process with filtered cathodic vacuum arc (FCVA). In this study, Taguchi method was adopted to design the optimized FCVA deposition process of ta-C for improving deposition efficiency and mechanical properties of the deposited ta-C thin film. The influence and contribution of variables, such as arc current, substrate bias voltage, frequency, and duty cycle, on the properties of ta-C were investigated in terms of deposition efficiency and mechanical properties. It was revealed that the deposition rate was linearly increased following the increasing arc current (around 10 nm/min @ 60 A and 17 nm/min @ 100A). The hardness and ID/IG showed a correlation with substrate bias voltage (over 30 GPa @ 50 V and under 30 GPa @ 250 V). The scratch tests were conducted to specify the effect of each parameter on the resistance to plastic deformation of films. The analysis on variances showed that the arc current and substrate bias voltage were the most effective controlling parameters influencing properties of ta-C films. The optimized parameters were extracted for the target applications in various industrial fields.