• Journal of the Korean Ceramic Society
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• v.43 no.11 s.294
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• pp.715-723
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• 2006

Perovskite oxide materials are very important for the electronics industry, because they exhibit promising properties. With an interest in the obvious applications, significant effort has been invested in the growth of highly crystalline epitaxial perovskite oxide thin films in our laboratory. And the desired structure of films was formed to achieve excellent properties. $Y_1Ba_2Cu_3O_{7-x}$ (YBCO) superconducting thin films were simultaneously deposited on both sides of 3 inch wafer by inverted cylindrical sputtering. Values of microwave surface resistance R$_2$ (75 K, 145 GHz, 0 T) smaller than 100 m$\Omega$ were reached over the whole area of YBCO thin films by pre-seeded a self-template layer. For implementation of voltage tunable high-quality varactor, A tri-layer structured SrTiO$_3$ (STO) thin films with different tetragonal distortion degree was prepared in order to simultaneously achieve a large relative capacitance change and a small dielectric loss. Highly a-axis textured $Ba_{0.65}Sr_{0.35}TiO_3$ (BST65/35) thin films was grown on Pt/Ti/SiO$_2$/Si substrate for monolithic bolometers by introducing $Ba_{0.65}Sr_{0.35}RuO_3$ (BSR65/35) thin films as buffer layer. With the buffer layer, the leakage current density of BST65/35 thin films were greatly reduced, and the pyroelectric coefficient of $7.6\times10_{-7}$ C $cm^{-2}$ $K^{-1}$ was achieved at 6 V/$\mu$m bias and room temperature.

• Proceedings of the KIEE Conference
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• 2007.07a
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• pp.1263-1264
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• 2007

자계 유도 고상결정화(FESPC)를 이용하여 제작한 다결정실리콘(poly-Si) 박막 트랜지스터(TFT)는 비정질 실리콘 박막 트랜지스터(a-Si:H TFT)보다 뛰어난 전기적 특성과 우수한 안정성을 지닌다. $V_{DS}$ = -0.1 V에서 채널 폭과 길이가 각각 $5\;{\mu}m$, $7\;{\mu}m$인 P형 TFT의 이동도(${\mu}$)와 문턱 전압($V_{TH}$)은 각각 $31.98\;cm^2$/Vs, -6.14 V 이다. FESPC TFT는 일반 poly-Si TFT에 비해 채널 내 결정 경계 숫자가 많아서 상대적으로 열악한 특성을 가진다. 채널 길이 $5\;{\mu}m$인 TFT의 $V_{TH}$는 채널 길이 $18\;{\mu}m$ 소자의 $V_{TH}$보다 1.36V 작지만, 일반적으로 큰 값이다. 이 현상은 채널에 다수의 결정 경계가 존재하고, 수평 전계가 크기 때문이다. 수평 전계가 증가하면, 결정 경계의 전위 장벽 높이가 감소하게 되는데, 이는 DIGBL 효과이다. ${\mu}$의 증가에 따라서, 드레인 전류가 증가하고 $V_{TH}$은 감소한다. 활성화 에너지($E_a$)는 드레인 전압과 결정 경계의 수에 따라 변하는데, 드레인 전압이 크거나 결정 경계의 수가 감소하면 $E_a$는 감소한다. $E_a$가 감소하면 $V_{TH}$가 감소한다. 유리기판 위의 FESPC를 이용한 P형 poly-Si TFT의 $V_{TH}$는 채널의 길이와 $V_{DS}$에 영향을 받는다. 증가한 수평 전계가 결정 경계에서 에너지 장벽을 낮추는 효과를 일으키기 때문이다.

• Proceedings of the Korean Institute of Surface Engineering Conference
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• 1999.10a
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• pp.59-59
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• 1999

In this study, planer inductively coupled $Cl_2$ based plasmas were used to etch InGaN and the effects of plasma conditions on the InGaN etch properties have been characterized using quadrupole mass spectrometry(QMS) and optical emission spectroscopy(OES). As process conditions used to study the effects of plasma characteristics on the InGaN etch properties, $Cl_2$ was used as the main etch gas and $CHF_3,{\;}CH_4$, and Ar were used as additive gases. Operational pressure was varied from SmTorr to 3OmTorr, inductive power and bias voltage were varied from 400W to 800W and -50V to -250V, respectively while the substrate temperature was fixed at 50 centigrade. For the $Cl_2$ plasmas, selective etching of GaN to InGaN was obtained regardless of plasma conditions. The small addition of $CHF_3$ or Ar to $Cl_2$ and the decrease of pressure generally increased InGaN etch rates. The selective etching of InGaN to GaN could be obtained by the reduction of pressure to l5mTorr in $CI_2/IO%CHF_3{\;}or{\;}CI_2/IO%Ar$ plasma. The enhancement of InGaN etch rates was related to the ion bombardment for $CI_2/Ar$ plasmas and the formation of $CH_x$ radicals for $CI_2/CHF_3(CH_4)$ plasmas.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.22 no.1
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• pp.114-124
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• 2011

In this paper, we present a 2 GHz compact analog phase shifter with linear phase-tune characteristic. The compact phase shifter was designed base on a lumped all pass network and implemented using a ceramic substrate fabricated with thin-film technique. For a linear phase-tune characteristic, a capacitance of the varactor diode for a tuning voltage was linearized by connecting series capacitor and subsequently produced an almost linear capacitance change. The inductor and bias circuit in the all pass network was implemented using a spiral inductors for small size, which results in the size reduction to $4\;mm{\times}4\;mm$. In order to measure the phase shifter using the probe station, two CPW pads are included at the input and output. The fabricated phase shifter showed an insertion loss of about 4.2~4.7 dB at 2 GHz band and a total $79^{\circ}$ phase change for DC control voltage from 0 to 5 V, and showed linear phase-tune characteristic as expected in the design.

• Korean Journal of Materials Research
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• v.5 no.6
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• pp.754-762
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• 1995

Strontium titanate(SrTiO$_3$) thin film was prepared on Si substrates by RF magnetron sputtering for a high capacitance density required for the next generation of LSTs. The optimum deposition conditions for SrTiO$_3$thin film were investigated by controlling the deposition parameters. The crystallinity of films and the interface reactions between SrTO$_3$film and Si substrate were characterized by XRD and AES respectively. High quality films were obtained by using the mixed gas of Ar and $O_2$for sputtering. The films were deposited at various bias voltages to obtain the optimum conditions for a high quality file. The best crystallinity was obtained at film thickness of 300nm with the sputtering gas of Ar+20% $O_2$and the bias voltage of 100V. The barrier layer of Pt(100nm)/Ti(50nm) was very effective in avoiding the formation of SiO$_2$layer at the interface between SrTiO$_3$film and Si substrate. The capacitor with Au/SrTiO$_3$/Pt/Ti/SiO$_2$/Si structure was prepared to measure the electric and the dielectric properties. The highest capacitance and the lowest leakage current density were obtained by annealing at $600^{\circ}C$ for 2hrs. The typical specific capacitance was 6.4fF/$\textrm{cm}^2$, the relative dielectric constant was 217, and the leakage current density was about 2.0$\times$10$^{-8}$ A/$\textrm{cm}^2$ at the SrTiO$_3$film with the thickness of 300nm.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.38 no.12
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• pp.8-13
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• 2001

Cerium oxide ($CeO_2$) thin film has been proposed as a buffer layer between the ferroelectric thin film and the Si substrate in Metal-Ferroelectric-Insulator-Silicon (MFIS) structures for ferroelectric random access memory (FRAM) applications. In this study, $CeO_2$ thin films were etched with $Cl_2$/Ar gas mixture in an inductively coupled plasma (ICP). Etch properties were measured for different gas mixing ratio of $Cl_2$($Cl_2$+Ar) while the other process conditions were fixed at RF power (600 W), dc bias voltage (-200 V), and chamber pressure (15 mTorr). The highest etch rate of $CeO_2$ thin film was 230 ${\AA}$/min and the selectivity of $CeO_2$ to $YMnO_3$ was 1.83 at $Cl_2$($Cl_2$+Ar gas mixing ratio of 0.2. The surface reaction of the etched $CeO_2$ thin films was investigated using x-ray photoelectron spectroscopy (XPS) analysis. There is a Ce-Cl bonding by chemical reaction between Ce and Cl. The results of secondary ion mass spectrometer (SIMS) analysis were compared with the results of XPS analysis and the Ce-Cl bonding was monitored at 176.15 (a.m.u). These results confirm that Ce atoms of $CeO_2$ thin films react with chlorine and a compound such as CeCl remains on the surface of etched $CeO_2$ thin films. These products can be removed by Ar ion bombardment.

• Proceedings of the IEEK Conference
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• 2005.11a
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• pp.679-682
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• 2005

Negative-differential conductance (NDC) characteristics as well as negative-differential trans-conductance (NDT) characteristics have been observed in the room temperature I-V characteristics of Field-induced Inter-band Tunneling Effect Transistors (FITETs). These characteristics have been explained with inter-band tunneling physics, from which, inter-band tunneling current flows when the energy bands of degenerately doped regions align, and it does not flow when they don't. FITET is an SOI device and the body region is not directly connected to the external terminal. Therefore, Fermi energy in the body region is determined by electrical coupling among four regions - gate, source, drain and substrate. So, a quasi Fermi energy of the majority carriers in the floating body region can be changed by external voltages, and this causes the energy band movements in the body region, which determine whether the energy bands between degenerately doped junctions aligns or not. This is a key point for an explanation of NDT and NDC characteristics. In this paper, a quasi Fermi energy movement in the floating body region of FITET was investigated by a device simulation. This result was applied for the description of relation between quasi Fermi energy in the body region and external gate bias voltage.

• Proceedings of the Korean Institute of Surface Engineering Conference
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• 2017.05a
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• pp.162-162
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• 2017

AlCrN 코팅은 높은 경도, 낮은 표면 조도 등의 상온에서의 우수한 기계적 특성 이외에 고온에서 안정한 합금상의 형성으로 인하여 우수한 내열성을 보이는 코팅이며, Si을 첨가하여 나노복합구조를 갖는 AlCrSiN 코팅은 고경도 특성을 나타내는 나노결정립과 고내열성을 나타내는 $Si_3N_4$ 비정질이 동시에 존재함으로써 뛰어난 고온 특성까지 보유하여 공구 코팅으로의 적용 가능성이 크다. 본 연구에서는, 가혹화된 공구사용 환경 대응 하는 더욱 우수한 내마모성 및 내열성을 보이는 코팅막을 개발하기 위해 AlCrN/AlCrSiN 이중층 코팅을 합성하였다. 합성된 코팅의 구조 및 물성을 분석하기 위해 field emission scanning electron microscopy(FE-SEM), nano-indentation, atomic force microscopy(AFM) 및 ball-on-disk wear tester를 사용하였다. 내열성을 확인하기 위하여 코팅을 furnace에 넣어 500, 600, 700, 800, 900도에서 30분 동안 annealing한 후에 nano-indentation을 사용하여 경도를 측정을 하였다. 5:5, 7:3, 9:1의 두께 비율로 AlCrN/AlCrSiN 이중층 코팅을 합성하였으며 모든 코팅의 두께는 $3{\mu}m$로 제어되었다. AlCrN 코팅층의 두께가 증가할수록, 이중층 코팅의 경도 및 내마모성은 점차 향상되었지만 코팅의 밀착력은 감소하였다. 일반적으로 AlCrN 코팅은 상대적으로 높은 잔류응력을 갖고 있으므로, AlCrN 층의 두께비율이 증가함에 따라 코팅내의 잔류응력이 높아져 코팅의 경도는 증가하고 밀착특성은 낮아진 것으로 판단된다. AlCrSiN 상부층 공정시 기판 바이어스 전압을 -50 ~ -200V 로 증가시키면서 이중층 코팅을 합성하였다. XRD 분석 결과, 공정 바이어스 전압이 증가함에 따라 AlCrSiN 상부층은 점차 비정질화 되었고, 코팅의 경도와 표면 특성이 향상되는 것을 확인하였다. 이러한 특성 향상은 높은 바이어스 인가가 이온 충돌효과의 증가를 야기시켰으, 이로 인해 치밀한 코팅층 합성에 의한 결과로 판단된다. AlCrN/AlCrSiN 이중층 코팅을 어닐링 한 후 경도 분석 결과, -150, -200V에서 합성한 코팅은 900도 이상에서 26GPa 이상의 높은 경도를 보인 것으로 보아 우수한 내열성을 갖는 것으로 확인 되었다. 이는 AlCrSiN 상부층의 높은 Si 함량 (11at.%) 으로 인한 충분한 $Si_3N_4$ 비정질상의 형성과, 고바이어스 인가로 인한 AlCrN 결정상과 $Si_3N_4$ 비정질상의 고른 분배가 코팅의 내열성을 향상시키는데 기여를 한 결과로 판단된다.

• Journal of Biosystems Engineering
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• v.25 no.2
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• pp.97-106
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• 2000

To develop the grain moisture meter using microwave free space transmission technique, a 10.5GHz microwave signal with the power of 11mW generated by an oscillar with a dielectric resonator is transmitted to an isolator and radiated from a transmitting $2{\times}2$ microstrip patch array antenna into the sample holder filled with the 12 to 26%w.b. of Korean Hwawung paddy rice. the microwave signal, attenuated through the grain with moisture, is collected by a receiving $2{\times}2$ microstrip patch array antenna and detected using a Shottky diode with excellent high frequency characteristic. A pair of light and simple microstrip patch array antenna for measurement of grain moisture content is designed and implemented on atenflon substrate with trleative dielectric constant of 2.6 and thickness of 0.54 by using Ensemble ver. 4.02 software. The aperture of microstrip patch arrays is 41 mm width and 24mm high. The characteristics of microstrip patch antenna such as grain. return loss, and bandwidth are 11.35dBi, -38dB and 0.35GHz($50^{\circ}$ at far-field pattern of E and H plane. The width of the sample holder is large enough to cover the signal between the antennas temperature and bulk density respectively. The calibration model for measurement of grain moisture content is proposed to reduce the effects of fluectuations in bulk density and temperature which give serious errors for the measurements . From the results of regression analysis using the statistically analysis method, the moisture content of grain samples (MC(%)) is expressed in terms of the output voltage(v), temperature (t), and bulk density of samples(${\rho}b$)as follows ;$$MC(%)\;=\;(-3.9838{\times}10^{-8}{\times}v^{3}+8.023{\times}10^{-6}{\times}v^{2}-0.0011{\times}v-0.0004{\times}t+0.1706){\frac{1}{{\rho}b}}{\times}100$ Its determination coefficient, standard error of prediction(SEP) and bias were found to be 0.9855, 0.479%w.b. and -0.0.369 %w.b. respectively between measured and predicted moisture contents of the grain samples.

• Journal of the Korean Ceramic Society
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• v.40 no.9
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• pp.842-848
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• 2003

Semiconducting $\alpha$-Fe$_2$O$_3$ film was prepared by the cathodic electrodeposition method on Indium Tin Oxide (ITO) substrate for photoelectrochemical cell application. After heat treatment at 50$0^{\circ}C$, the phase was changed from Fe to $\alpha$-Fe$_2$O$_3$. The phase, morphology, absorbance, and photocurrent density (A/$\textrm{cm}^2$) of the film depended on the preparation conditions: deposition time, applied voltage, and the duration of heat treatment. The $\alpha$-Fe$_2$O$_3$ film was characterized by X-Ray Diffractometer (XRD), Scanning Electron Microscope (SEM), and UV -Visible Spectrophotometer. The stability of the $\alpha$-Fe$_2$O$_3$ film in aqueous solution was tested at zero bias potential under the white-light source of 100 mW/$\textrm{cm}^2$. The apparent grain size of the films formed at -2.0 V was larger than that grown at -2.5 V. The $\alpha$-Fe$_2$O$_3$ film deposited at -2.0 V for 180 s and heat-treated at 50$0^{\circ}C$ for 1 h showed the predominant photocurrent of 834$\mu$A/$\textrm{cm}^2$.