• 제목/요약/키워드: Straightforward

검색결과 636건 처리시간 0.028초

A 10-bit 10MS/s differential straightforward SAR ADC

  • Rikan, Behnam Samadpoor;Abbasizadeh, Hamed;Lee, Dong-Soo;Lee, Kang-Yoon
    • IEIE Transactions on Smart Processing and Computing
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    • 제4권3호
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    • pp.183-188
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    • 2015
  • A 10-bit 10MS/s low power consumption successive approximation register (SAR) analog-to-digital converter (ADC) using a straightforward capacitive digital-to-analog converter (DAC) is presented in this paper. In the proposed capacitive DAC, switching is always straightforward, and its value is half of the peak-to-peak voltage in each step. Also the most significant bit (MSB) is decided without any switching power consumption. The application of the straightforward switching causes lower power consumption in the structure. The input is sampled at the bottom plate of the capacitor digital-to-analog converter (CDAC) as it provides better linearity and a higher effective number of bits. The comparator applies adaptive power control, which reduces the overall power consumption. The differential prototype SAR ADC was implemented with $0.18{\mu}m$ complementary metal-oxide semiconductor (CMOS) technology and achieves an effective number of bits (ENOB) of 9.49 at a sampling frequency of 10MS/s. The structure consumes 0.522mW from a 1.8V supply. Signal to noise-plus-distortion ratio (SNDR) and spurious free dynamic range (SFDR) are 59.5 dB and 67.1 dB and the figure of merit (FOM) is 95 fJ/conversion-step.

Digital Error Correction for a 10-Bit Straightforward SAR ADC

  • Rikan, Behnam Samadpoor;Abbasizadeh, Hamed;Do, Sung-Han;Lee, Dong-Soo;Lee, Kang-Yoon
    • IEIE Transactions on Smart Processing and Computing
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    • 제4권1호
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    • pp.51-58
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    • 2015
  • This paper proposes a 10-b SAR ADC. To increase the conversion speed and reduce the power consumption and area, redundant cycles were implemented digitally in a capacitor DAC. The capacitor DAC algorithm was straightforward switching, which included digital error correction steps. A prototype ADC was implemented in CMOS $0.18-{\mu}m$ technology. This structure consumed $140{\mu}W$ and achieved 59.4-dB SNDR at 1.25MS/s under a 1.8-V supply. The figure of merit (FOM) was 140fJ/conversion-step.

Zeno Series, Collective Causation, and Accumulation of Forces

  • Yi, Byeong-Uk
    • 논리연구
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    • 제11권2호
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    • pp.127-170
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    • 2008
  • This paper aims to present solutions to three intriguing puzzles on causation that Benardete presents by considering the results of infinite series of telescoping events. The main conceptual tool used in the solutions is the notion of collective causation, what many events cause collectively. It is straightforward to apply the notion to resolve two of the three puzzles. It does not seem as straightforward to apply it to the other puzzle. After some preliminary clarifications of the situation that Benardete describes to present the puzzle, however, we can apply the notion to resolve it as well.

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A Straightforward Estimation Approach for Determining Parasitic Capacitance of Inductors during High Frequency Operation

  • Kanzi, Khalil;Nafissi, Hanidreza R.;Kanzi, Majid
    • Journal of international Conference on Electrical Machines and Systems
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    • 제3권3호
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    • pp.339-353
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    • 2014
  • A straightforward method for optimal determining of a high frequency inductor's parasitic capacitance is presented. The proposed estimation method is based on measuring the inductor's impedance samples over a limited frequency range bordering on the resonance point considering k-dB deviation from the maximum impedance. An optimized solution to k could be obtained by minimizing the root mean squared error between the measured and the estimated impedance values. The model used to provide the estimations is a parallel RLC circuit valid at resonance frequency which will be transferred to the real model considering the mentioned interval of frequencies. A straightforward algorithm is suggested and programmed using MATLAB which does not require a wide knowledge of design parameters and could be implemented using a spectrum analyzer. The inputs are the measured impedance samples as a function of frequency along with the diameter of the conductors. The suggested algorithm practically provides the estimated parameters of a real inductance model at different frequencies, with or without design information. The suggested work is different from designing a high frequency inductor; it is rather concentration of determining the parameters of an available real inductor that could be easily done by a recipe provided to a technician.

반도체 Fab의 생산선형성 향상을 위한 일간생산계획 방법론 (A Daily Production Planning Method for Improving the Production Linearity of Semiconductor Fabs)

  • 정근채;박문원
    • 대한산업공학회지
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    • 제41권3호
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    • pp.275-286
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    • 2015
  • In this paper, we propose a practical method for setting up a daily production plan which can operate semiconductor fabrication factories more stably and linearly by determining work in process (WIP) targets and movement targets. We first adjust cycle times of the operations to satisfy the monthly production plan. Second, work in process (WIP) targets are determined to control the production progress of operations: earliness and tardiness. Third, movement targets are determined to reduce cumulated differences between WIP targets and actual WIPs. Finally, the determined movement targets are modified through a simulation model which considers capacities of the equipments and allocations of the WIPs in the fab. The proposed daily production planning method can be easily adapted to the memory semiconductor fabs because the method is very simple and has straightforward logics. Although the proposed method is simple and straightforward, the power of the method is very strong. Results from the shop floor in past few periods showed that the proposed methodology gives a good performance with respect to the productivity, workload balance, and machine utilization. We can expect that the proposed daily production planning method will be used as a useful tool for operating semiconductor fabrication factories more efficiently and effectively.

A Bayes Rule for Determining the Number of Common Factors in Oblique Factor Model

  • Kim, Hea-Jung
    • Journal of the Korean Statistical Society
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    • 제29권1호
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    • pp.95-108
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    • 2000
  • Consider the oblique factor model X=Af+$\varepsilon$, with defining relation $\Sigma$$\Phi$Λ'+Ψ. This paper is concerned with suggesting an optimal Bayes criterion for determining the number of factors in the model, i.e. dimension of the vector f. The use of marginal likelihood as a method for calculating posterior probability of each model with given dimension is developed under a generalized conjugate prior. Then based on an appropriate loss function, a Bayes rule is developed by use of the posterior probabilities. It is shown that the approach is straightforward to specify distributionally and to imploement computationally, with output readily adopted for constructing required cirterion.

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A Note on the Characteristic Function of Multivariate t Distribution

  • Song, Dae-Kun;Park, Hyoung-Jin;Kim, Hyoung-Moon
    • Communications for Statistical Applications and Methods
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    • 제21권1호
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    • pp.81-91
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    • 2014
  • This study derives the characteristic functions of (multivariate/generalized) t distributions without contour integration. We extended Hursts method (1995) to (multivariate/generalized) t distributions based on the principle of randomization and mixtures. The derivation methods are relatively straightforward and are appropriate for graduate level statistics theory courses.

손등 정맥 패턴을 이용한 개인식별 알고리즘의 회전 보상에 관한 연구 (A Study on A Rotation Compensation of Person Identification Algorithm Utilizing Hand Vein Pattern)

  • 안장용;주일용;최환수
    • 대한전자공학회:학술대회논문집
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    • 대한전자공학회 2000년도 추계종합학술대회 논문집(4)
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    • pp.251-254
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    • 2000
  • This paper proposes an enhanced algorithm for person identification system utilizing hand vein pattern. The conventional algorithm does not cope with distortion caused by image rotation caused by misplaced hands on the imaging device. A straightforward approach to consider the rotaional compensation required too much computational load, thus, we devised an approach to expect the rotation direction along with image translation, reducing the compuational requirement dramatically In this paper, we present the details of the algorithm with experimental results with the new algorithm.

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콘크리트의 건조수축과 수리에너지의 상관관계 (A Relationship between Drying Shrinkage and Water Potential)

  • 한만엽
    • 한국콘크리트학회:학술대회논문집
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    • 한국콘크리트학회 1992년도 가을 학술발표회 논문집
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    • pp.58-61
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    • 1992
  • Water potential which controls miosture movement in concrete is a kind of stress which causes concrete shrinks or expands. Therefore, there is a straightforward relationship between the water potential and the shrinkage strain. Explicit equations which show the relationships between the two parameters were derived through rational process. Two micro mechanisms among three shrinkage mechanisms were considered in the theory. Thermocouple psychrometer were embedded in a concrete slab to measure the water potential and also to find a correlation with the shrinkage. The test results prove the validity of the theory, and show the way to utilize the delived equations.

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