• Journal of the Korean Institute of Telematics and Electronics C
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• v.36C no.4
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• pp.31-43
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• 1999

The main goal of this paper is to design a high performance SVP(Stack based Video Processor) for network applications. The SVP is a comprehensive scheme; 'better' in the sense that it is an optimal selection of previously proposed enhancements of a stack machine and a video processor. This can process effectively object-based video data using a S-RISC(Stack-based Reduced Instruction Set Computer) with a semi -general-purpose architecture having a stack buffer for OOP(Object-Oriented Programming) with many small procedures at running programs. And it includes a vector processor that can improve the MPEG coding speed. The vector processor in the SVP can execute advanced mode motion compensation, motion prediction by half pixel and SA-DCT(Shape Adaptive-Discrete Cosine Transform) of MPEG-4. Absolutors and halfers in the vector processor make this architecture extensive to a encoder. We also designed a VLSI stack-oriented video processor using the proposed architecture of stack-oriented video decoding. It was designed with O.5$\mu\textrm{m}$ 3LM standard-cell technology, and has 110K logic gates and 12 Kbits SRAM internal buffer. The operating frequency is 50MHz. This executes algorithms of video decoding for QCIF 15fps(frame per second), maximum rate of VLBV(Very Low Bitrate Video) in MPEG-4.

• IEMEK Journal of Embedded Systems and Applications
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• v.9 no.4
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• pp.205-210
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• 2014

Cache based live migration method utilizes a cache, which is accessible to both side (remote and local), to reduce the virtual machine migration time, by transferring only irredundant data. However, address space layout randomization (ASLR) is proved to reduce the memory duplicate ratio between targeted migration memory and the migration cache. In this pager, we analyzed the behavior of ASLR to find out how it changes the physical memory contents of virtual machines. We found that among six virtual memory regions, only the modification to stack influences the page-level memory duplicate ratio. Experiments showed that: (1) the ASLR does not shift the heap region in sub-page level; (2) the stack reduces the duplicate page size among VMs which performed input replay around 40MB, when ASLR was enabled; (3) the size of memory pages, which can be reconstructed from the fresh booted up state, also reduces by about 60MB by ASLR. With those observations, when applying cache-based migration method, we can omit the stack region. While for other five regions, even a coarse page-level redundancy data detecting method can figure out most of the duplicate memory contents.

• Annual Conference of KIPS
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• 2001.10b
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• pp.1541-1544
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• 2001

Java virtual machine의 성능을 향상시키기 위해 "JIT(Just-in-Time)"code generator가 고안되었다[3], JIT code generator는 스택기반의 자바 바이트 코드를 레지스터 기반의 native machine code로 변환해 주는 역할을 수행하여 바이트 코드의 번역시간을 줄여준다. 그러나 JIT 는 많은 레지스터의 사용을 야기시키므로 효율적인 레지스터 allocation 정책이 필요하고 스택과 레지스터 간의 traffic 을 가중시킨다. 그러므로 본 논문에서는 자바 바이트 코드의 효율적인 stack allocation 정책을 JIT code generator에 적용함으로 레지스터와의 traffic을 줄이는 방법을 제시하였다.

• Proceedings of the Korean Society of Machine Tool Engineers Conference
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• 1996.10a
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• pp.28-33
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• 1996

This paper presents a position control of ultra-precision machine tool post using piezoelectric material. A stack-type piezoelectric actuator is employed in a hinge-type tool holder. An assumed linear transfer function of the practical nonlinear plant is established through the comparison of transfer functions and step responses in the experiments and the simulations. Several types of feedforward/feedback controllers are designed via computer simulations using the assumed linear transfer function, The position tracking control experiments are undertaken to show the control efficiency of each controller.

• Proceedings of the KIEE Conference
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• 2006.07a
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• pp.599-600
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• 2006

Multi-slacked HTS tapes are needed to conduct large current in the power application of superconducting machine. This paper deals with the transport current loss of multi-stacked YBCO coated conductor. YBCO coated conductor that was used in this experiment has two Cu layers above and below of YBCO layer for stabilization. Transport losses of four different stacks, single, 2 stack, 3 stack and 4 stack, were measured. Measured results were compared analytic equation suggested by Norris.

• Proceedings of the KIEE Conference
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• 2006.07d
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• pp.2231-2232
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• 2006

Multi-stacked HTS tapes are needed to conduct large current in the power application of superconducting machine. This paper deals with the transport current loss of multi-stacked YBCO coated conductor. YBCO coated conductor that was used in this experiment has two Cu layers above and below of YBCO layer for stabilization. Transport losses of four different stacks, single, 2 stack, 3 stack and 4 stack, were measured. Measured results were compared analytic equation suggested by Norris.

• Proceedings of the IEEK Conference
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• 2003.07b
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• pp.927-930
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• 2003

In this paper, a design of processor IP for TCP/IP protocol stack is described. The processor consists of input and output buffer memory with dual bank structure, 32-bit RISC microprocessor core, DMA unit with on-the-fly checksum capability. To handle the various modes of TCP/IP protocol, hardware and software co-design approach is used rather than the conventional state machine based design. To eliminate delay time due to the data transfer and checksum operation, DAM module which can execute the checksum operation on-the-fly along with data transfer operation is adopted. By programming the on-chip code ROM of RISC processor differently. the designed stack processor can support the packet format conversion operations required in the various TCP/IP protocols.

• Proceedings of the Korean Society of Machine Tool Engineers Conference
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• 2003.04a
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• pp.190-195
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• 2003

CFRP composite has a lot of merits such as mechanical characteristic, light weight, and thermal resistance. For these merits CFRP is applied to so many industrial area. In this paper, the relationship between the stack thickness and drill diameter is examined from the drilling experiment, which is the drilling of 16, 32, 48 plies specimen with the $\phi$8, $\phi$10, $\phi$12mm cemented carbide drill. The results are analyzed with consideration of cutting force, stack thickness and drill diameter.

• Proceedings of the KIEE Conference
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• 2006.07b
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• pp.1265-1266
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• 2006

Multi-stacked HTS tapes are needed to conduct large current in the power application of superconducting machine. This paper deals with the transport current loss of multi-stacked YBCO coated conductor. YBCO coated conductor that was used in this experiment has two Cu layers above and below of YBCO layer for stabilization. Transport losses of four different stacks, single, 2 stack, 3 stack and 4 stack, were measured. Measured results were compared analytic equation suggested by Norris.

• Proceedings of the KIEE Conference
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• 2006.07c
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• pp.1725-1726
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• 2006

Multi-stacked HTS tapes are needed to conduct large current in the power application of superconducting machine. This paper deals with the transport current loss of multi-stacked YBCO coated conductor. YBCO coated conductor that was used in this experiment has two Cu layers above and below of YBCO layer for stabilization. Transport losses of four different stacks, single, 2 stack, 3 stack and 4 stack, were measured. Measured results were compared analytic equation suggested by Norris.