• 한국정보디스플레이학회:학술대회논문집
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• 2007.08a
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• pp.155-158
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• 2007

Printed organic thin-film transistor(OTFT) to use as a switching device for an organic light emitting diode(OLED) were fabricated in the microcontact printing and direct printing processes at room temperature. The gate electrodes($5{\mu}m$, $10{\mu}m$, and $20{\mu}m$) of OTFT was fabricated using microcontact printing process, and source/drain electrodes ($W/L=500{\mu}m/5{\mu}m$, $500{\mu}m/10{\mu}m$, and $500{\mu}m/20{\mu}m$) was fabricated using direct printing process with hard poly(dimethylsiloxane)(h-PDMS) stamp. Printed OTFT with dielectric layer was formed using special coating system and organic semiconductor layer was ink-jet printing process. Microcontact printing and direct printing processes using h-PDMS stamp made it possible to fabricate printed OTFT with channel lengths down to $5{\mu}m$, and reduced the process by 20 steps compared with photolithography. As results of measuring he transfer characteristics and output characteristics of OTFT fabricated with the printing process, the field effect characteristic was verified.

• Applied Chemistry for Engineering
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• v.23 no.3
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• pp.289-292
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• 2012

Au electrodes modified with self-assembled monolayers (SAMs) were used to control the work function of source/drain electrodes in triethylsilylethynyl anthradithiophene (TES ADT)-based organic thin film transistors (OTFTs). By using benzothiol (BT) and pentafluorobenzothiol (PFBT) SAMs, the hole injection barrier between Au and the highest occupied molecular orbital (HOMO) of TES ADT was controlled. After a solvent annealing, TES ADT OTFTs with PFBT SAM-treated Au electrodes were found to exhibit high field-effect mobilities of $0.05\;cm^2/Vs$ and on/off current ratios of $10^6$.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.33 no.5
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• pp.427-431
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• 2020

In this research, we evaluated the electrical properties of polycrystalline-gallium-oxIde (Ga₂O₃) thin films grown by mist-CVD. A 500~800 nm-thick Ga₂O₃ film was used as a channel in a fabricated bottom-gate MOSFET device. The phase stability of the β-phase Ga₂O₃ layer was enhanced by an annealing treatment. A Ti/Al metal stack served as source and drain electrodes. Maximum drain current (I_D) exceeded 1 mA at a drain voltage (V_D) of 20 V. Electron mobility of the β-Ga₂O₃ channel was determined from maximum transconductance (g_m), as approximately, 1.39 ㎠/Vs. Reasonable device characteristics were demonstrated, from measurement of drain current-gate voltage, for mist-CVD-grown Ga₂O₃ thin films.

• Proceedings of the Korean Vacuum Society Conference
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• 2011.08a
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• pp.127-127
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• 2011

We investigate the transparent TFTs using a transparent ZnSnO3 (ZTO)/Ag/ZTO multilayer electrode as S/D electrodes with low resistivity of $3.24{\times}10^{-5}$ ohm-cm, and high transparency of 86.29% in ZTO based TFTs. The Transparent TFTs (TTFTs) are prepared on glass substrate coated 100 nm of ITO thin film. On atomic layer deposited $Al_2\;O_3$, 50 nm ZTO layer is deposited by RF magnetron sputtering through a shadow mask for channel layer using ZTO target with 1 : 1 molar ratio of ZnO : $SnO_2$. The power of 100W, the working pressure of 2mTorr, and the gas flow of Ar 20 sccm during the ZTO deposition. After channel layer deposition, a ZTO (35 nm)/Ag (12 nm)/ZTO(35 nm) multilayer is deposited by DC/RF magnetron sputtering to form transparent S/D electrodes which are patterned through the shadow mask. Devices are annealed in air at 300$^{\circ}C$ for 30 min following ZTO deposition. Using UV/Visible spectrometer, the optical transmittances of the TTFT using ZTO/Ag/ ZTO multilayer electrodes are compared with TFT using Mo electrode. The structural properties of ZTO based TTFT with ZTO/Ag/ZTO multilayer electrodes are analyzed by high resolution transmission electron microscopy (HREM) and X-ray photoelectron spectroscopy (XPS). The transfer and output characterization of ZTO TTFTs are examined by a customized probe station with HP4145B system in are.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2002.04b
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• pp.45-48
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• 2002

Poly(3-hexylthiophene) or P3HT based organic thin film transistor (OTFT) array was fabricated on flexible poly carbonate substrates and the electrical characteristics were investigated. As the gate dielectric, a dual layer structure of polyimide-$SiO_2$ was used to improve the roughness of $SiO_2$ surface and further enhancing the device performance and also source-drain electrodes were $O_2$ plasma treated for improvement of the electrical properties, such as drain current and field effect mobility. For the active layer, polymer semiconductor, P3HT layer was printed by contact-printing and spin-coating method. The electrical properties of OTFT devices printed by both methods were evaluated for the comparison. Based on the experiments, P3HT-based OTFT array with field effect mobility of 0.02~0.025 $cm^{2}/V{\cdot}s$ and current modulation (or $I_{on}/I_{off}$ ratio) of $10^{3}\sim10^{4}$ was fabricated.

• 한국정보디스플레이학회:학술대회논문집
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• 2000.01a
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• pp.69-70
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• 2000

There are currently considerable interest in the applications of conjugated polymers, oligomers, and small molecules for thin-film electronic devices. Organic materials have potential advantages to be utilized as semiconductors in field-effect transistors and light-emitting diodes. In this study, pentacene thin-film transistors (TFTs) were fabricated on glass substrate. Aluminums were used for gate electrodes. Silicon dioxide was deposited as a gate insulator by PECVD and patterned by reactive ion etching (R.I.E). Gold was used for the electrodes of source and drain. The active semiconductor pentacene layer was thermally evaporated in vacuum at a pressure of about $10^{-8}$ Torr and a deposition rate $0.3{\AA}/s$. The fabricated devices exhibited the field-effect mobility as large as 0.07 $cm^2/V.s$ and on/off current ratio as larger than $10^7$.

• Proceedings of the Korean Vacuum Society Conference
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• 2015.08a
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• pp.209.2-209.2
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• 2015

Two dimensional layered materials, such as transition metal dichalcogenides (TMDs) family have been attracted significant attention due to novel physical and chemical properties. Among them, molybdenum disulfide ($MoS_2$) has novel physical phenomena such as absence of dangling bonds, lack of inversion symmetry, valley degrees of freedom. Previous studies have shown that the interface of metal/$MoS_2$ contacts significantly affects device performance due to presence of a scalable Schottky barrier height at their interface, resulting voltage drops and restricting carrier injection. In this study, we report a new device structure by using few-layer graphene as the bottom interconnections, in order to offer Schottky barrier free contact to bi-layer $MoS_2$. The fabrication of process start with mechanically exfoliates bulk graphite that served as the source/drain electrodes. The semiconducting $MoS_2$ flake was deposited onto a $SiO_2$ (280 nm-thick)/Si substrate in which graphene electrodes were pre-deposited. To evaluate the barrier height of contact, we employed thermionic-emission theory to describe our experimental findings. We demonstrate that, the Schottky barrier height dramatically decreases from 300 to 0 meV as function of gate voltages, and further becomes negative values. Our findings suggested that, few-layer graphene could be able to realize ohmic contact and to provide new opportunities in ohmic formations.

• Proceedings of the Korean Vacuum Society Conference
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• 2012.02a
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• pp.154-154
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• 2012

Flexible complementary inverters based on thin-film transistors (TFTs) are important because they have low power consumption and high voltage gain compared to single type circuits. We have manufactured flexible complementary inverters using pentacene and amorphous indium gallium zinc oxide (IGZO) for the p-channel and n-channel, respectively. The circuits were fabricated on polyimide (PI) substrate. Firstly, a thin poly-4-vinyl phenol (PVP) layer was spin coated on PI substrate to make a smooth surface with rms surface roughness of 0.3 nm, which was required to grow high quality IGZO layers. Then, Ni gate electrode was deposited on the PVP layer by e-beam evaporator. 400-nm-thick PVP and 20-nm-thick ALD Al2O3 dielectric was deposited in sequence as a double gate dielectric layer for high flexibility and low leakage current. Then, IGZO and pentacene semiconductor layers were deposited by rf sputter and thermal evaporator, respectively, using shadow masks. Finally, Al and Au source/drain electrodes of 70 nm were respectively deposited on each semiconductor layer using shadow masks by thermal evaporator. The characteristics of TFTs and inverters were evaluated at different bending radii. The applied strain led to change in voltage transfer characteristics of complementary inverters as well as source-drain saturation current, field effect mobility and threshold voltage of TFTs. The switching threshold voltage of fabricated inverters was decreased with increasing bending radius, which is related to change in parameters of TFTs. Throughout the bending experiments, relationship between circuit performance and TFT characteristics under mechanical deformation could be elucidated.

• Proceedings of the KIEE Conference
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• 2002.07c
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• pp.1590-1592
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• 2002

In this work the electrical characteristics of organic TFTs using organic insulator and flexible polyester substrate have been investigated. Pentacene and PVP(polyvinylphenol) are used as an active semiconducting layer and dielectric layer respectively. Pentacene was thermally evaporated in vacuum at a pressure of about $1{\times}10^{-6}$ Torr and at a deposition rate of $0.5{\AA}$/sec, and PVP was spin-coated. Aluminium and gold were used for gate and source/drain electrodes. 0.1mm thick flexible polyester substrate was used instead of glass or silicon wafer.

• Journal of information and communication convergence engineering
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• v.13 no.4
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• pp.257-263
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• 2015

In this study, organic field-effect transistors (OFETs) using a copper phthalocyanine (CuPc) material as an active layer and SiO₂ as a gate insulator were fabricated with varying active layer thicknesses and channel lengths. Further, using a thermal evaporation method in a high-vacuum system, we fabricated a CuPc FET device of the top-contact type and used Au materials for the source and drain electrodes. In order to discuss the channel formation and FET characteristics, we observed the typical current-voltage characteristics and calculated the threshold voltage of the CuPc FET device. We also found that the capacitance reached approximately 97 pF at a negative applied voltage and increased upon the accumulation of carriers at the interface of the metal and the CuPc material. We observed the typical behavior of a FET when used as an n-channel FET. Moreover, we calculated the threshold voltage to be about 15-20 V at V_DS = -80 V.