• Proceedings of the International Microelectronics And Packaging Society Conference
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• 2002.05a
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• pp.126-129
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• 2002

This article presents that the affecting factors to solderability and initial reliability. It was discussed that effect of the solder ball hardness and composition on the reliability of solder joints. In this study, lead free solder alloys with compositions of Sn-Cu, Sn-Ag, Sn-Ag-Cu, Sn-Ag-Cu-Bi were applied to the $\muBGA$ packages. As a result of experiments, the high degree of hardness with the displacement of 0.22mm was obtained Sn-2.0Ag-0.7Cu-3.0Bi. The shear strength of lead free solder was higher than of Sn-37Pb solder, and it was increased about 150% in Sn-2.0Ag-0.7Cu-3.0Bi.

• Proceedings of the International Microelectronics And Packaging Society Conference
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• 2003.09a
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• pp.165-172
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• 2003

Wafer-level packaging technology has become established with increase of demands for miniaturizing and realizing lightweight electronic devices evolution. This packaging technology enables the smallest footprint of packaged chip. Various structures and processes has been proposed and manufactured currently, and products taking advantages of wafer-level package come onto the market. The package enables mounting semiconductor chip on print circuit board as is a case with conventional die-level CSP's with BGA solder bumps. Bumping technology is also advancing in both lead-free solder alternative and wafer-level processing such as stencil printing using solder paste. It is known lead-free solder bump formation by stencil printing process tend to form voids in the re-flowed bump. From the result of FEM analysis, it has been found that the strain in solder joints with voids are not always larger than those of without voids. In this paper, characteristics of wafer-level package and effect of void in solder bump on its reliability will be discussed.

• Korean Journal of Materials Research
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• v.4 no.3
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• pp.329-333
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• 1994

A large number of grain boundaries were seen to crack in near-eutectic solder joints of leadless ceramic chip carriers (LLCC's) during thermal cycling at temperature ranges from -$35^{\circ}C$ to +$125^{\circ}C$ with lhr time period. One potential explanation for this type of cracking might be the presence of embrittling species on the boundary. Although there do not appear to be any instances reported in the literature of solders being embrittled by small amounts of contaminating species, the possibility of such an occurrence exists. The potential presence of impurities located at crack surfaces was inspected using Scanning Auger Microprobe(SAM) and it was found that intergranular cracking could be accomplished by the oxidation of the grain boundary. A physical model for fatigue crack growth was introduced, in which grain boundary separation took place under oxidation facilitated by sliding.

• Korean Journal of Materials Research
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• v.17 no.8
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• pp.402-407
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• 2007

In electronics manufacturing processes, soldering process has generally been used in surface mounting technology. Because of environmental restriction, lead free solders as like a SnAgCu ternary system are being used widely. After soldering process, the formation and growth of intermetalic compounds(IMCs) are formed in the interface between solder and Cu substrate as follows isothermal temperature and time. In this studies, therefore, we investigated the effects of the Cu substrate thickness on the IMC formation and growth of Sn-40Pb/Cu and Sn-3.0Ag-0.5Cu/Cu solder joints, respectively. The effect of the Cu thickness in PCB Cu pad and pure Cu plate was analyzed as measuring of thickness of each IMC. After solder was soldered on PCB and Cu plate which have different Cu thickness, we measured the IMC thickness in solder joints respectively. Also we compared with the effectiveness of Cu thickness on the IMC growth. From these results, we calculated the activation energy.

• Journal of the Microelectronics and Packaging Society
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• v.21 no.4
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• pp.97-103
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• 2014

Among various lead-free solders, the Sn-58Bi solders have been considered as a highly promising lead-free solders because of its low melting temperature and high tensile strength. However, Sn-58Bi solder has the poor ductility. To enhance the mechanical property of Sn-58Bi solder, epoxy-enhanced Sn-58Bi solders have been studied. This study compared the microstructures and the mechanical properties of Sn-58Bi solder and Sn-58Bi epoxy solder with aging treatment. The solders ball were formed on the printed circuit board (PCB) with organic solderability preservative (OSP) surface finish, and then the joints were aged at 85, 95, 105 and $115^{\circ}C$ for up to 100, 300, 500 and 1000 hours. The shear test was conducted to evaluate the mechanical property of the solder joints. $Cu_6Sn_5$ intermetallic compound (IMC) layer grew with increasing aging time and temperature. The IMC layer for the Sn-58Bi epoxy solder was thicker than that for the Sn-58Bi solder. According to result of shear test, the shear strength of Sn-58Bi epoxy solder was higher than that of Sn-58Bi solder and the shear strength decreased with increasing aging time.

• Journal of Welding and Joining
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• v.20 no.2
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• pp.90-94
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• 2002

FC-BGA has advantages over other interconnection methods including high I/O counts, better electrical performance, high throughput, and low profile. But, FC-BGA has a lot of reliability issues. The 2nd level solder joint reliability of the FC-BGA with large chip on laminate substrate was studied in this paper. The purpose of this study is to discuss solder joint failures of 2nd level thermal cycling test. This work has been done to understand the influence of the structure of package, the properties of underfill, the properties and thickness of bismaleimide tiazine substrate and the temperature range of thermal cycling on 2nd level solder joint reliability. The increase of bismaleimide tiazine substrate thickness applied to low modulus underfill was improve of solder joint reliability. The resistance of solder ball fatigue was increased solder ball size in the solder joints of FC-BGA.

• Applied Microscopy
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• v.46 no.3
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• pp.167-169
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• 2016

Solder/electroless nickel immersion gold (ENIG) joint sample which is comprised of dissimilar materials with different mechanical properties has limited the level of success in preparing thin samples for transmission electron microscopy (TEM). This short technical note reports the operation parameters for ultramicrotomy of solder joint sample and TEM analysis results. The solder joint sample was successfully sliced to 50~70 nm thick lamellae at slicing speed of 0.8~1.2 mm/s using a boat-type $45^{\circ}$ diamond knife. Ultramicrotomy can be applied as a routine sample preparation technique for TEM analysis of solder joints.

• Journal of Korea Foundry Society
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• v.22 no.1
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• pp.35-41
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• 2002

To improve the reliability of solder joints, a composite solder which consists of solder matrix and intermetallic reinforcements was manufactured by a new method. The cast ingot of Sn-6.9Cu-2.9Ag alloy had primary Cu6Sn5 intermetallics in the form of dendrites. After rolling the ingot, the intermetallic dendrites were crushed into fine particles and distributed uniformly throughout the solder matrix. As the rolled strips became thinner, the average size of the crushed particles reached a critical size which did not decrease any more by further rolling. The critical size was nearly the same as the average width of intermetallic dendrite trunk. The crushed intermetallic particles did not melt and remained in solid state during reflow soldering due to their high meltingterm-perature. The coarsening and gravitational segregation of the particles were observed during reflow soldering.

• Journal of the Korean Society for Precision Engineering
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• v.15 no.7
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• pp.26-35
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• 1998

This paper presents a visual inspection algorithm looking for solder joint defects of IC chips on PCBs (Printed Circuit Boards). In this algorithm, seven features are proposed in order to categorize the solder joints into four classes such as normal, insufficient, excess, and no solder, and optimal back-propagation network is determined by error evaluation which depend on the number of neurons in hidden and out-put layers and selection of the features. In the end, a good accuracy of classification performance, an optimal determination of network structure and the effectiveness of chosen seven features are examined by experiment using proposed inspection algorithm.

• Journal of the Microelectronics and Packaging Society
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• v.9 no.3
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• pp.31-36
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• 2002

The 2nd level solder joint reliability of 153 FC-BGA for high-speed SRAM (Static Random Access Memory) with the large chip on laminate substrate comparing to PBGA(Plastic Ball Grid Array) was studied in this paper. This work has been done to understand an influence as the mounting with single side or double sides, structure of package, properties of underfill, properties and thickness of substrate and size of solder ball on the thermal cycling test. It was confirmed that thickness of BT(bismaleimide tiazine) substrate increased from 0.95 mm to 1.20 mm and solder joint fatigue life improved about 30% in the underfill with the low young's modulus. And resistance against the solder ball crack became twice with an increase of the solder ball size from 0.76 mm to 0.89 mm in solder joints.