• Proceedings of the Korean Vacuum Society Conference
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• 2013.02a
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• pp.293-293
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• 2013

최근 디스플레이산업이 발달하면서 투명전도성 물질에 대한 산업의 요구도가 높아지고 있다. ITO투명전도성 박막은 낮은 비저항과 우수한 식각특성을 가지고 있어 평면표시소자, 광소자, 터치패널 그리고 가스 센서 등 다양한 분야에 응용되고 있으며 디스플레이 소자가 소형화 되어감에 따라 박막의 다기능화가 요구되고 있다. 본 실험에서는 전기적 특성과 친, 발수특성을 동시에 가지는 다기능성 ITO 박막을 연구하였다. RIE방식으로 식각을 통하여 Poly Si-wafer 표면에 미세구조를 만든 기판과 Slide Glass기판에 RF-magnetron sputtering 방법을 이용해 ITO박막을 증착하여 비교분석 하였다. ITO박막 증착시 $100{\sim}400^{\circ}C$ 열처리와 산소를 사용하지 않고 Ar 가스만을 사용하여 실험한 후 열처리온도에 따른 전기적 특성 및 접촉각에 대하여 조사하였다. 3 uL의 Di-water를 사용하여 접촉각을 측정한 결과 $400^{\circ}C$ 열처리가 된 Poly si-wafer 위에 증착된 ITO 박막에서 초-친수 특성을 나타냈으며, 그 위에 PTFE을 증착하였을 경우 12 uL의 Di-water를 사용하여 약 $150^{\circ}$ 이상의 초-발수 특성을 나타내었다. 전기적 특성은 $5.8{\times}10^{-4}$의 비 저항을 나타내었다. 이러한 전기적 특성과 친 발수 특성을 동시에 가지는 ITO 박막은 Anti-Fogging, self-Cleaning, Solar cell 및 디스플레이소자 등 다양한 산업에 이용 가능할 것으로 생각된다.

• Proceedings of the IEEK Conference
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• 2003.07b
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• pp.743-746
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• 2003

We have successfully used hydrophobic direct-wafer bonding, along with H-induced layer splitting of Ge, to transfer 700nm think, single-crystal Ge films to Si substrates. Optical and electrical properties have been also observed on these samples. Triple-junction solar cell structures gown on these Ge/Si heterostructure templates show comparable photoluminescence intensity and minority carrier lifetime to a control structure grown on bulk Ge. When heavily doped p$^{+}$Ge/p$^{+}$Si wafer bonded heterostructures were bonded, ohmic interfacial properties with less than 0.3Ω$\textrm{cm}^2$ specific resistance were observed indicating low loss thermal emission and tunneling processes over and through the potential barrier. Current-voltage (I-V) characteristics in p$^{+}$Ge/pSi structures show rectifying properties for room temperature bonded structures. After annealing at 40$0^{\circ}C$, the potential barrier was reduced and the barrier height no longer blocks current flow under bias. From these observations, interfacial atomic bonding structures of hydrophobically wafer bonded Ge/Si heterostructures are suggested.ested.

• Proceedings of the Korean Vacuum Society Conference
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• 2016.02a
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• pp.346.2-346.2
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• 2016

The rear side contact recombination in the crystalline silicon solar cell could be reduced by back surface field. We formed polycrystalline silicon as a back surface field through crystallization of amorphous silicon. A thin silicon oxide applied to the passivation layer. We used quasi-steady-state photoconductance measurement to analyze electrical properties with various annealing condition. And, blister formed on surface of wafer during the annealing process. We observed the blister after varied annealing process with wafer of various surface. Shape and density of blister is influenced by various annealing temperature and process time. As the annealing temperature became higher, the average diameter of blister is decreased and total number of blister is increased. The sample with the $600^{\circ}C$ annealing temperature and 1 min annealing time exhibited the highest implied open circuit voltage and lifetime. We predicted that the various shape and density of blister affects the lifetime and implied open circuit voltage.

• Proceedings of the Materials Research Society of Korea Conference
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• 2010.05a
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• pp.38.2-38.2
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• 2010

We have studied mechanisms of back contact formation in Al evaporation and screen printed Al paste for Si solar cells by TEM analysis. We observed that Si diffuse into Al during heat up. The Si diffusion process made vacancies in Si wafer. The Al began to seep into the Si wafer (Al spike). During heat down, the Al spike were shrink which causes the doped region (BSF).

• Proceedings of the Korean Vacuum Society Conference
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• 2012.02a
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• pp.604-604
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• 2012

기존의 실리콘 이종접합 태양전지는 후면에도 passivation layer인 i-a-Si:H 및 BSF층인 n-a-Si:H가 형성되는 구조를 가지고 있었다. 이러한 구조를 대체하기 위하여 본 연구에서는 실리콘 이종접합 태양전지의 후면 구조에 passivation 층 및 BSF층을 novel material인 Sb증착 및 RTP, laser anneal을 통해 새로운 BSF층 형성하고 태양전지 특성에 대해서 분석하였다. 이를 위해서 carrier lifetime, LIV, DIV 및 QE 등 전기적, 광학적 분석뿐만 아니라 SIMS 분석을 통하여 laser annealing 공정으로 형성된 BSF층의 depth profile 분석도 진행하였다. 또한 wafer orientation에 따른 특성을 분석하기 위하여 (100) 및 (111) wafer를 이용하여 분석하였다.

• Ceramist
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• v.21 no.2
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• pp.75-82
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• 2018

In the photovoltaics (PV) industry, there were many efforts to reduce the cost of production with high efficiency. The single most important cost factor in silicon technology is the wafer, accounting presently for ~35% of the module cost. it was already shown that the solar cell efficiency can be maintained up to the thickness range of $40-60{\mu}m$. The direct production of ultra-thin silicon wafer is very attractive and numerous different techniques, such as electrochemical process, ion implantation, and epitaxial growth, have been proposed and developed in many academic and industrial laboratories.

• The Transactions of the Korean Institute of Electrical Engineers C
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• v.53 no.2
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• pp.62-66
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• 2004

This paper investigated the characteristics of a newly developed high density hollow cathode plasma (HCP) system and its application for the etching of silicon wafers. We used SF$_{6}$ and $O_2$ gases in the HCP dry etch process. Silicon etch rate of $0.5\mu\textrm{m}$/min was achieved with $SF_6$$O_2$plasma conditions having a total gas pressure of 50mTorr, and RF power of 100 W. This paper presents surface etching characteristics on a crystalline silicon wafer and large area cast type multicrystlline silicon wafer. The results of this experiment can be used for various display systems such as thin film growth and etching for TFT-LCDs, emitter tip formations for FEDs, and bright plasma discharge for PDP applications.s.

• Transactions on Electrical and Electronic Materials
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• v.14 no.3
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• pp.160-163
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• 2013

We investigated the effect of light intensity and wavelength of a solar cell device by using photoconductive atomic force microscopy (PC-AFM). The $POCl_3$ diffusion doping process was used to produce a p-n junction solar cell device based on a Poly-Si wafer and the electrical properties of prepared solar cells were measured using a solar cell simulator system. The measured open circuit voltage ($V_{oc}$) is 0.59 V and the short circuit current ($I_{sc}$) is 48.5 mA. Also, the values of the fill factors and efficiencies of the devices are 0.7% and approximately 13.6%, respectively. In addition, PC-AFM, a recent notable method for nano-scale characterization of photovoltaic elements, was used for direct measurements of photoelectric characteristics in local instead of large areas. The effects of changes in the intensity and wavelength of light shining on the element on the photoelectric characteristics were observed. Results obtained through PC-AFM were compared with the electric/optical characteristics data obtained through a solar simulator. The voltage ($V_{PC-AFM}$) at which the current was 0 A in the I-V characteristic curves increased sharply up to 1.8 $mW/cm^2$, peaking and slowly falling as light intensity increased. Here, $V_{PC-AFM}$ at 1.8 $mW/cm^2$ was 0.29 V, which corresponds to 59% of the average $V_{oc}$ value, as measured with the solar simulator. Also, while light wavelength was increased from 300 nm to 1,100 nm, the external quantum efficiency (EQE) and results from PC-AFM showed similar trends at the macro scale, but returned different results in several sections, indicating the need for detailed analysis and improvement in the future.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2010.06a
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• pp.244-244
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• 2010

Doping process of crystalline silicon solar cell process is very important which is as influential on efficiency of solar. Doping process consists of pre -deposition and diffusion. Each of these processes is important in the process temperature and process time. Through these process conditions variable, p-n junction depth can be controled to low and high. In this paper, we studied a optimized doping pre-deposition temperature for high solar cell efficiency. Using a $200{\mu}m$ thickness multi-crystalline silicon wafer, fixed conditions are texture condition, sheet resistance($50\;{\Omega}/sq$), ARC thickness(80nm), metal formation condition and edge isolation condition. The three variable conditions of pre-deposition temperature are $790^{\circ}C$, $805^{\circ}C$ and $820^{\circ}C$. In the $790^{\circ}C$ pre-deposition temperature, we achieved a best solar cell efficiency of 16.2%. Through this experiment result, we find a high efficiency condition in a low pre-deposition temperature than the high pre-deposition temperature. We optimized a pre-deposition temperature for high solar cell efficiency.

• 한국태양에너지학회:학술대회논문집
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• 2011.04a
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• pp.105-110
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• 2011

The doping procedure in crystalline silicon solar cell fabrication usually contains oxygen injection during drive-in process and removal of phosphorous silicate glass(PSG). In this paper, we studied the effect of oxygen injection and PSG on conversion efficiency of solar cell. The mono crystalline silicon wafers with $156{\times}156mm^2$, $200{\mu}m$, $0.5-3.0{\Omega}{\cdot}cm$ and p-type were used. After etching $7{\mu}m$ of the surface to form the pyramidal structure, the P(phosphorous) was injected into silicon wafer using diffusion furnace to make the emitter layer. After then, the silicon nitride was deposited by the PECVD with 80 nm thickness and 2.1 refractive index. The silver and aluminium electrodes for front and back sheet, respectively, were formed by screen-printing method, followed by firing in 400-425-450-550-$880^{\circ}C$ five-zone temperature conditions to make the ohmic contact. Solar cells with four different types were fabricated with/without oxygen injection and PSG removal. Solar cell that injected oxygen during the drive-in process and removed PSG after doping process showed the 17.9 % conversion efficiency which is best in this study. This solar cells showed $35.5mA/cm^2$ of the current density, 632 mV of the open circuit voltage and 79.5 % of the fill factor.