• Journal of the Korean Institute of Telematics and Electronics C
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• v.35C no.6
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• pp.39-47
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• 1998

A fourth-order $\Sigma$-$\Delta$ modulator is designed and implemented in 0.6 $\mu\textrm{m}$ CMOS technology. The modulator is verified by introducing nonlinear factors such as DC gain and slew rate in system model that determines the transfer function in S-domain and in time-domain. Dynamic range is more than 110 dB and the peak SM is 102.6 dB at a clock rate of 2.8224 MHz for voiceband signal. The structure of a ∑-$\Delta$ modulator is a modified fourth-order ∑-$\Delta$ modulator using direct feedback loop method, which improves performance and consumes less power. The transmission zero for noise is located in the first-second integrator loop, which reduces entire size of capacitors, reduces the active area of the chip, improves the performance, and reduces power dissipation. The system is stable because the output variation with respect to unit time is small compared with that of the third integrator. It is easy to implement because the size of the capacitor in the first integrator, and the size of the third integrator is small because we use the noise reduction technique. This paper represents a new design method by modeling that conceptually decides transfer function in S-domain and in Z-domain, determines the cutoff frequency of signal, maximizes signal power in each integrator, and decides optimal transmission-zero frequency for noise. The active area of the prototype chip is 5.25$\textrm{mm}^2$, and it dissipates 10 mW of power from a 5V supply.

• Journal of Korean Society for Geospatial Information Science
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• v.18 no.2
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• pp.21-28
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• 2010

Air pollution monitoring has attracted a lot of interests because it affects directly to the human life quality. The most of the current air pollution monitoring stations use the expensive and bulky instruments and are only installed in the specific area. Therefore, it is difficult to install them to as many places as people need. In this work, we constructed a low price and small size Radio Frequency(RF) sensor system to solve this problem. This system also had the measurement range similar to the ones used in the air pollution forecast systems. This system had the sensor unit to measure the air quality, the central processing unit for air quality data acquisition, the power unit to supply the power to every units, and the RF unit for the wireless transmission and reception of the data. This system was easy to install in the field. We also added a GPS unit to track the position of the RF-sensor in real time by wireless communication. For the various measurements of the air pollution, we used CO, $O_3$, $NO_2$ sensors as gas sensors and also installed a dust sensor.

• Journal of Ocean Engineering and Technology
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• v.16 no.1
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• pp.64-70
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• 2002

This paper shows the results of the development of a small size of digital type continuous and intermittent welding auto-carriage based on microprocessor (Intel 80196KC) for welding process with long welding line. The developed welding auto-carriage loads welding torch and tracks welding line. It is an automaton largely used for welding process with a lot of long welding lines such as shipbuilding and structure. Most traditional auto-carriages have been developed based on analog circuit for open loop control. So this analog circuit welding auto-carriage cannon control welding speed. Specially welding auto-carriage for intermittent welding condition is so complicated and has the low precision of control performance in welding distance and non-welding distance. The auto-carriage developed in this paper has the following characteristics: It has not only functions of traditional carriage but also functions such as pseudo-welding process of big iron structures, intermittent welding in order to limit heat for welding thin plates, crater treatment of the final step of welding, acceleration at the initial step of welding and deceleration in the final step of welding. The main control board of auto-carriage, power supply system and DC motor drive wee developed and manufactured. The welding speed and the welding distance of the developed auto-carriage are controlled accurately by feedback control using photo-sensor. Hardware and software robust against the heat and noise produced on the welding process are developed.

• Fire Science and Engineering
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• v.26 no.1
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• pp.61-67
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• 2012

In the three-phase power system using the three-phase motor, when any one-phase is open-phase, the unbalanced current flows and the single-phase power supplied by power supply produces overcurrent to motor coil. As a result, the enormous damage and electrical fire can be given to the power system. Recently, the thermal over-current relay (THR) or electronic motor protection relay (EMPR) is mostly used as the open-phase detection device of the three-phase motor. When the over-current or overheat of electric line is generated, it detects and operates circuit breaker, but there is the defect that the sensing speed is slow, the operation can be sometimes failed, and the precision is decreased. In order to improve these problems, this paper is proposed a new control circuit topology for openphase protection using semiconductor devices. Therefore, the proposed open-phase protection device (OPPD) enhances the sensing speed and precision, and has the advantage of simple fitting in the three-phase motor control panel in the field, as it manufactures into small size and light weight. As a result, the proposed OPPD protects the three-phase motor, minimizes the electrical fire from openphase, and contributes for the stable driving of the power system. The performance and confidence of the proposed OPPD is confirmed by a great variety of the experiments of operation characteristic.

• Journal of the Korea Academia-Industrial cooperation Society
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• v.16 no.12
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• pp.8643-8648
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• 2015

In this paper presents the design and demonstrate 8 W 3-stage HPA(High Power Amplifier) MMIC(Monolithic Microwave Integrated Circuits) for Ka-band down link satellite communications payload system at 19.5 GHz ~ 22 GHz frequency band. The HPA MMIC consist of 3-stage GaN HEMT(Hight Electron Mobility Transistors). The gate periphery of $1^{st}$ stage, $2^{nd}$ stage and output stage is determined $8{\times}50{\times}2$ um, $8{\times}50{\times}4$ um and $8{\times}50{\times}8$ um, respectively. The fabricated HPA MMIC shows size $3,400{\times}3,200um^2$, small signal gain over 29.6 dB, input matching -8.2 dB, output matching -9.7 dB, output power 39.1 dBm and PAE 25.3 % by using 0.15 um GaN technology at 20 V supply voltage in 19.5~22 GHz frequency band. Therefore, this HPA MMIC is believed to be adaptable Ka-band satellite communication payloads down link system.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.46 no.1
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• pp.98-106
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• 2009

This work proposes a 1280-RGB $\times$ 800-Dot 70.78mW 0.l3um CMOS LCD driver IC (LDI) for high-performance 16M-color low temperature poly silicon (LTPS) thin film transistor liquid crystal display (TFT-LCD) systems such as ultra mobile PC (UMPC) and mobile applications simultaneously requiring high resolution, low power, and small size at high speed. The proposed LDI optimizes power consumption and chip area at high resolution based on a resistor-string based architecture. The single column driver employing a 1:12 MUX architecture drives 12 channels simultaneously to minimize chip area. The implemented class-AB amplifier achieves a rail-to-rail operation with high gain and low power while minimizing the effect of offset and output deviations for high definition. The supply- and temperature-insensitive current reference is implemented on chip with a small number of MOS transistors. A slew enhancement technique applicable to next-generation source drivers, not implemented on this prototype chip, is proposed to reduce power consumption further. The prototype LDI implemented in a 0.13um CMOS technology demonstrates a measured settling time of source driver amplifiers within 1.016us and 1.072us during high-to-low and low-to-high transitions, respectively. The output voltage of source drivers shows a maximum deviation of 11mV. The LDI with an active die area of $12,203um{\times}1500um$ consumes 70.78mW at 1.5V/5.5V.

• Journal of the Korea Academia-Industrial cooperation Society
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• v.9 no.4
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• pp.878-885
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• 2008

The FPDs(Flat Panel Displays) such as LCD(Liquid Crystal Display) and PDP(Plasma Display Panel) and OLED(Organic Light Emitting Diode), recently, have been substituted for CRT(Cathode Ray Tube) displays because they have a convex surface, small volume, light weight and lower electric power consumption. The productivity of FPDs is greatly dependent on the area of thin glass panel with 0.6 - 0.8mm thickness because FPDs are manufactured by cutting a large-scaled thin glass panel with patterns to the required product dimensions. So FPD's industries are trying to increase the area of thin glass panel. For example, the thin glass panel size of the 8th generation is 2,200mm in width, 2,600mm in length and 0.7mm in thickness. The air flows both in the thin glass panel and in the porous PE-plate surface were modeled and analyzed, from which a working condition was estimated. The thin glass panel on the porous PE-plate surface with self-lubricating characteristics was investigated and compared with that on the square duct floating bar surface with many holes of 1mm diameter when the thin glass panel contacts the floating bar surface due to malfunction of electric power supply.

• Journal of the Institute of Electronics and Information Engineers
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• v.50 no.7
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• pp.122-130
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• 2013

This work proposes a 12b 100MS/s 45nm CMOS four-step pipeline ADC for high-speed digital communication systems requiring high resolution, low power, and small size. The input SHA employs a gate-bootstrapping circuit to sample wide-band input signals with an accuracy of 12 bits or more. The input SHA and MDACs adopt two-stage op-amps with a gain-boosting technique to achieve the required DC gain and high signal swing range. In addition, cascode and Miller frequency-compensation techniques are selectively used for wide bandwidth and stable signal settling. The cascode current mirror minimizes current mismatch by channel length modulation and supply variation. The finger width of current mirrors and amplifiers is laid out in the same size to reduce device mismatch. The proposed supply- and temperature-insensitive current and voltage references are implemented on chip with optional off-chip reference voltages for various system applications. The prototype ADC in a 45nm CMOS demonstrates the measured DNL and INL within 0.88LSB and 1.46LSB, respectively. The ADC shows a maximum SNDR of 61.0dB and a maximum SFDR of 74.9dB at 100MS/s, respectively. The ADC with an active die area of $0.43mm^2$ consumes 29.8mW at 100MS/s and a 1.1V supply.

• Investigative Magnetic Resonance Imaging
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• v.23 no.3
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• pp.179-201
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• 2019

Portable low-cost magnetic resonance imaging (MRI) systems have the potential to enable "point-of-care" and timely MRI diagnosis, and to make this imaging modality available to routine scans and to people in underdeveloped countries and areas. With simplicity, no maintenance, no power consumption, and low cost, permanent magnets/magnet arrays/magnet assemblies are attractive to be used as a source of static magnetic field to realize the portability and to lower the cost for an MRI scanner. However, when taking the canonical Fourier imaging approach and using linear gradient fields, homogeneous fields are required in a scanner, resulting in the facts that either a bulky magnet/magnet array is needed, or the imaging volume is too small to image an organ if the magnet/magnet array is scaled down to a portable size. Recently, with the progress on image reconstruction based on non-linear gradient field, static field patterns without spatial linearity can be used as spatial encoding magnetic fields (SEMs) to encode MRI signals for imaging. As a result, the requirements for the homogeneity of the static field can be relaxed, which allows permanent magnets/magnet arrays with reduced sizes, reduced weight to image a bigger volume covering organs such as a head. It offers opportunities of constructing a truly portable low-cost MRI scanner. For this exciting potential application, permanent magnets/magnet arrays have attracted increased attention recently. A magnet/magnet array is strongly associated with the imaging volume of an MRI scanner, image reconstruction methods, and RF excitation and RF coils, etc. through field patterns and field homogeneity. This paper offers a review of permanent magnets and magnet arrays of different kinds, especially those that can be used for spatial encoding towards the development of a portable and low-cost MRI system. It is aimed to familiarize the readers with relevant knowledge, literature, and the latest updates of the development on permanent magnets and magnet arrays for MRI. Perspectives on and challenges of using a permanent magnet/magnet array to supply a patterned static magnetic field, which does not have spatial linearity nor high field homogeneity, for image reconstruction in a portable setup are discussed.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.46 no.3
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• pp.75-85
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• 2009

This work proposes a 13b 100MS/s 0.13um CMOS ADC for 3G communication systems such as two-carrier W-CDMA applications simultaneously requiring high resolution, low power, and small size at high speed. The proposed ADC employs a four-step pipeline architecture to optimize power consumption and chip area at the target resolution and sampling rate. Area-efficient high-speed high-resolution gate-bootstrapping circuits are implemented at the sampling switches of the input SHA to maintain signal linearity over the Nyquist rate even at a 1.0V supply operation. The cascode compensation technique on a low-impedance path implemented in the two-stage amplifiers of the SHA and MDAC simultaneously achieves the required operation speed and phase margin with more reduced power consumption than the Miller compensation technique. Low-glitch dynamic latches in sub-ranging flash ADCs reduce kickback-noise referred to the differential input stage of the comparator by isolating the input stage from output nodes to improve system accuracy. The proposed low-noise current and voltage references based on triple negative T.C. circuits are employed on chip with optional off-chip reference voltages. The prototype ADC in a 0.13um 1P8M CMOS technology demonstrates the measured DNL and INL within 0.70LSB and 1.79LSB, respectively. The ADC shows a maximum SNDR of 64.5dB and a maximum SFDR of 78.0dB at 100MS/s, respectively. The ABC with an active die area of $1.22mm^2$ consumes 42.0mW at 100MS/s and a 1.2V supply, corresponding to a FOM of 0.31pJ/conv-step.