• 제목/요약/키워드: Skew-correction

검색결과 25건 처리시간 0.018초

카메라 획득 문서영상에서의 글자모양 왜곡보정 (Character Shape Distortion Correction of Camera Acquired Document Images)

  • 장대근;김의정
    • 한국정보통신학회논문지
    • /
    • 제10권4호
    • /
    • pp.680-686
    • /
    • 2006
  • 스캐너로 획득한 문서영상을 대상으로 문자인식을 하는 경우와 달리 카메라로 획득한 문서 영상을 대상으로 문자인식을 수행할 경우 카메라 렌즈의 특성과 카메라와 피사체간의 위치와 각도의 불일치에 의해 글자모양의 왜곡이 발생한다. 따라서 이러한 왜곡들로 인해 실제로 사용이 가능한 카메라 문자인식 기술의 개발이 쉽지 않았다. 본 논문에서는 문서 영상을 카메라로 획득할 때 발생하는 3차원의 비선형적 왜곡을 2차원의 선형 변환을 이용하여 근사화함으로써 왜곡된 글자모양을 교정한다. 또한 변환과정에서 글자와 글자줄을 추출하여 상하로는 글자줄의 배열방향을, 좌우로는 문자획의 기울어진 각도를 측정함으로써 왜곡으로 인해 사변형 형태로 변형된 글자영역 즉 변환영역을 자동으로 설정함으로써 부가적인 정보의 획득 없이 문서영상 자체만으로 기하하적 왜곡보정이 가능하다.

결합 신경망을 이용한 여권 MRZ 정보 인식 (Recognition of Passport MRZ Information Using Combined Neural Networks)

  • 김진호
    • 디지털산업정보학회논문지
    • /
    • 제15권4호
    • /
    • pp.149-157
    • /
    • 2019
  • In case of reading passport using a smart phone in contrast with a dedicated passport reading system, MRZ(Machine Readable Zone) character recognition can be hard when the character strokes were broken, touched or blurred according to the lighting condition, and the position and size of MRZ character lines were varied due to the camera distance and angle. In this paper, the effective recognition algorithm of the passport MRZ information using a combined neural network recognizer of CNN(Convolutional Neural Network) and ANN( Artificial Neural Network), is proposed under the various sized and skewed passport images. The MRZ line detection using connected component analysis algorithm and the skew correction using perspective transform algorithm are also designed in order to achieve effective character segmentation results. Each of the MRZ field recognition results is verified by using five check digits for deciding whether retrying the recognition process of passport MRZ information or not. After we implement the proposed recognition algorithm of passport MRZ information, the excellent recognition performance of the passport MRZ information was obtained in the experimental results for PC off-line mode and smart phone on-line mode.

Evaluation of peak-fitting software for magnesium quantification through k0-instrumental neutron activation analysis

  • Dasari, Kishore B.;Cho, Hana;Jacimovic, Radojko;Park, Byung-Gun;Sun, Gwang-Min
    • Nuclear Engineering and Technology
    • /
    • 제54권2호
    • /
    • pp.462-468
    • /
    • 2022
  • The selection and effective utilization of peak-fitting software for conventional gamma-ray spectrum analysis is significant for accurate determination of the mass fraction of elements, particularly in complex peak regions. Majority of the peak-fitting programs can derive similar peak characteristics for singlet peaks, but very few programs can deconvolute multi-peaks in a complex region. The deconvolution of multi-peaks requires special peak-fitting functions, such as left and right-skew distributions. In the this study, 843.76 keV (27Mg) peak area from the complex region (840 keV-850 keV) determined and compared using four different peak-fitting programs, namely, GammaVision, Genie2000, HyperLab, and HyperGam. The 843.76 keV peak interfered with 841.63 keV (152mEu) and 846.81 keV (56Mn). The total Mg concentration was determined through k0-instrumental neutron activation analysis by applying the isotopic interference correction factor 27Al(n,p)27Mg through the simultaneous determination of Al concentration. HyperLab and HyperGam peak-fitting programs reported consistent peak areas, and resultant concentrations agreed with the certified values of matrix-certified reference materials.

A 6b 1.2 GS/s 47.8 mW 0.17 mm2 65 nm CMOS ADC for High-Rate WPAN Systems

  • Park, Hye-Lim;Kwon, Yi-Gi;Choi, Min-Ho;Kim, Young-Lok;Lee, Seung-Hoon;Jeon, Young-Deuk;Kwon, Jong-Kee
    • JSTS:Journal of Semiconductor Technology and Science
    • /
    • 제11권2호
    • /
    • pp.95-103
    • /
    • 2011
  • This paper proposes a 6b 1.2 GS/s 47.8 mW 0.17 $mm^2$ 65 nm CMOS ADC for high-rate wireless personal area network systems. The proposed ADC employs a source follower-free flash architecture with a wide input range of 1.0 $V_{p-p}$ at a 1.2 V supply voltage to minimize power consumption and high comparator offset effects in a nanometer CMOS technology. The track-and-hold circuits without source followers, the differential difference amplifiers with active loads in pre-amps, and the output averaging layout scheme properly handle a wide-range input signal with low distortion. The interpolation scheme halves the required number of pre-amps while three-stage cascaded latches implement a skew-free GS/s operation. The two-step bubble correction logic removes a maximum of three consecutive bubble code errors. The prototype ADC in a 65 nm CMOS demonstrates a measured DNL and INL within 0.77 LSB and 0.98 LSB, respectively. The ADC shows a maximum SNDR of 33.2 dB and a maximum SFDR of 44.7 dB at 1.2 GS/s. The ADC with an active die area of 0.17 $mm^2$ consumes 47.8 mW at 1.2 V and 1.2 GS/s.

LPDDR2 메모리 컨트롤러를 위한 830-Mb/s/pin 송수신기 칩 구현 (Chip Implementation of 830-Mb/s/pin Transceiver for LPDDR2 Memory Controller)

  • 이종혁;송창민;장영찬
    • 전기전자학회논문지
    • /
    • 제26권4호
    • /
    • pp.659-670
    • /
    • 2022
  • 본 논문에서는 ×32 LPDDR2 메모리를 지원하는 컨트롤러를 위한 830-Mb/s/pin 송수신기가 설계된다. 여덟 개의 단위 회로로 구성된 송신단은 34Ω ∽ 240Ω 범위의 임피던스를 가지고 임피던스 보정 회로에 의해 제어된다. 송신되는 DQS의 신호는 DQ의 신호들 대비 90° 이동된 위상을 가진다. 수신 동작시 read time 보정은 바이트 내에서 per-pin 스큐 보정과 클록-도메인 전환을 통해 수행된다. 구현된 LPDDR2 메모리 컨트롤러를 위한 송수신기는 1.2V 공급 전압을 사용하는 55-nm 공정에서 설계되었으며 830-Mb/s/pin의 신호 전송률을 가진다. 각 lane의 면적과 전력 소모는 각각 0.664 mm2과 22.3 mW이다.