• 한국초전도ㆍ저온공학회논문지
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• 제4권2호
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• pp.11-15
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• 2002

High speed probe for measurement of sin91e flux quantum circuits is comprised of coaxial cables and microstrip lines in order to carry high speed signals without loss. For the impedance matching between coaxial cable and microstrip line, we have determined the dimension of the microstrip line with 50${\Omega}$ impedance by simulation and then have investigated the effect of line width and cross-sectional shape of signal line, dielectric material, thickness of soldering lead at the coaxial-to-microstrip transition Point, and the an91c between dielectric material and end part of the signal line on the characteristics of signal transmission of the microstrip line. From the simulation, we have found that these all parameter's had influenced on the characteristic of signal transmission on the microstrip line and should be reflected in fabricating high speed probe, We have also determined the dimension of coplanar waveguide to fabricate testing sample for performance test of high speed probe.

• 한국초전도학회:학술대회논문집
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• 한국초전도학회 2000년도 High Temperature Superconductivity Vol.X
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• pp.189-192
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• 2000

We fabricated rapid single-flux-quantum RS flip-flop circuits with and without Y$_1$Ba$_2$Cu$_3$O$_{7-{\delta}}$(YBCO) ground plane. The circuit consists of SNS-type ramp-edge Josephson junctions that have cobalt-doped YBCO and Sr$_2$AITaO$_6$(SAT) for barrier layer and insulator layer, respectively. The fabricated Josephson junction showed a typical RSJ-like current-voltage(I-V) characteristics above 50K. We sucessfuly demonstrated RS flip-flop at temperatures around 50K. The RS flip-flop fabricated on ground plane showed more definite set and reset state in voltage-flux(V-${\phi}$) modulation curve for read SQUID, which may be attributed to a shielding effect of the YBCO ground plane.

• Progress in Superconductivity
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• 제4권1호
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• pp.74-79
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• 2002

High-speed probe made to test single flux quantum(SFQ) circuits was comprised of semi-rigid coaxial cables and microstrip lines. The impedance was set at 50 $\Omega$to carry high-speed signals without much loss. To do performance test of high-speed probe, we have attempted to fabricate a test chip which has a coplanar waveguide(CPW) structure. Electromagnetic simulation was done to optimize the dimension of CPW so that the CPW structure has an impedance of 50$\Omega$, matching in impedance with the probe. We also used the simulation to investigate the effect of the width of signal line and the gap between signal line and ground plane to the characteristics of CPW structure. We fabricated the CPW structure with a gold film deposited on Si wafer whose resistivity was above $1.5\times$10$_4$$\Omega$.cm. The magnitudes of S／sub 21／ of CPW at 6 ㎓ in simulations and in the actual measurements done with a network analyzer were: -0.1 ㏈ and -0.33 ㏈ (type A),-0.2 ㏈ and -0.48 ㏈ (type B), respectively. Using the test chip, we have successfully tested the performance of high-speed probe made for SFQ circuits. The probe showed the good performance overthe bandwidth of 10 ㎓.

• 전자공학회지
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• 제25권9호
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• pp.58-64
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• 1998

• 한국초전도학회:학술대회논문집
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• 한국초전도학회 2001년도 High Temperature Superconductivity Vol.XI
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• pp.9-9
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• 2001

• 한국초전도학회:학술대회논문집
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• 한국초전도학회 1999년도 High Temperature Superconductivity Vol.IX
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• pp.238-241
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• 1999

Analog-to-digital converter has attracted a lot of interests as one of the most prospective area of an application of Josephson Junction technology. Recently, the development of a digital-to-analog converter has been pursued to achieved the high performance. One of the main advantage in using single flux quantum logic in a digital-to-analog converter is the low voltage drop in a single Josephson Junction and hence the resolution of the output voltage of this digital-to-analog converter can be very high. In this work, we have used a software, called WRspice, to study a voltage multiplier circuit which is the basic block in building a digital-to-analog circuit. In simulation, we operated a voltage multiplier with .4 Josephson Junctions per stage and studied the dependence on the circuit bias currents and the circuit inductors of the voltage multiplier. Our simulation results showed a fast operation and reasonable circuit margins.

• 한국초전도학회:학술대회논문집
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• 한국초전도학회 1999년도 High Temperature Superconductivity Vol.IX
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• pp.133-133
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• 1999

We have fabricated and tested a simple circuit of the rapid single-flux-quantum(RSFQ) four-stage shift register using a single layer high-T$_c$ superconducting (HTS) YBa$_2Cu_3O_{7-x}$ (YBCO) thin film structure with 9 step-edge Josephson junctions. The circuit includes two read superconducting quantum interference devices(SQUID) and four stages. To establish a robust HTS RSFQ device fabrication process, we have focussed the reproducible process of sharp and straight step-edge formation as well as the ratio of film thickness to step height t/h. The spread of step-edge junction parameters was measured from each13 junctions with t/h=l/3, l/2, and 2/3 at various temperatures. We have demonstrated the simplified operation of the shift register at 65 K..

• 한국초전도ㆍ저온공학회논문지
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• 제4권1호
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• pp.17-20
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• 2002

A complex single flux quantum(SFQ) circuit could be made up of various elementary cells such as JTL(Josephson transmission line), Splitter, XOR, DC/SFQ, SFQ/DC, T flip-flop, ‥‥, etc. In this work, we have designed and simulated a SFQ circuit, which consists of DC/SFQ, JTL and SFQ/DC, based on Nb/AlO$_{x}$Nb Josephson junction technology From the simulation, we could obtain the margins for various circuit parameters. And also we have successfully operated the circuit, which was fabricated with the same design, up to the input signal frequency of about 20 GHz.z.

• 한국초전도ㆍ저온공학회논문지
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• 제4권1호
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• pp.35-39
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• 2002

We have simulated and laid out a Single Flux Quantum(SFQ) AND gate for Arithmetic Logic Unit by using XIC, WRspice and Lmeter. SFQ AND gate circuit is a combination of two D Flip-Flop. D Flip-Flop and dc SQUID are the similar shape form the fact that it has the loop inductor and two Josephson junction We obtained perating margins and accomplished layout of the AND gate. We got the margin of $\pm$38%. over. After layout, we drew mask for fabrication of SFQ AND sate. This mask was included AND gate, dcsfq, sfqdc, rs flip-flop and jtl.

• Progress in Superconductivity
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• 제3권1호
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• pp.87-90
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• 2001

We designed a high temperature superconducting rapid single flux quantum(RSFQ) T flip-flop(TFF) circuit using Xic and WRspice. According to the optimized circuit parameters, we fabricated the TFF circuit with $Y_1$$Ba_2$Cu$_3$$O_{7-x}$(YBCO) interface-controlled Josephson junctions. The whole circuit was comprised of five epitaxial layers including YBCO ground plane. The interface-controlled Josephson junction was fabricated with natural junction barrier that was formed by interface-treatment process. In addition, we report second design for a new flip-flop without ground palne.e.