• Journal of the Institute of Electronics Engineers of Korea SD
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• v.43 no.6 s.348
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• pp.9-17
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• 2006

We proposed a new High-speed CMOS Level Up/Down Shifter circuits that can be used with Dynamic Voltage and Frequency Scaling(DVFS) algorithm, for low power system in the SoC(System-on-Chip). This circuit used to interface between the other voltage levels in each CMOS circuit boundary, or between multiple core voltage levels in a system bus. Proposed circuit have advantage that decrease speed attenuation and duty ratio distortion problems for interface. The level up/down shifter of the proposed circuit designed that operated from multi core voltages$(0.6\sim1.6V)$ to used voltage level for each IP at the 500MHz input frequency The proposed circuit supports level up shifting from the input voltage levels, that are standard I/O voltages 1.8V, 2.5V, 3.3V, to multiple core voltage levels in between of $0.6V\sim1.6V$, that are used internally in the system. And level down shifter reverse operated at 1Ghz input frequency for same condition. Simulations results are shown to verify the proposed function by Hspice simulation, with $0.6V\sim1.6V$ CMOS Process, $0.13{\mu}m$ IBM CMOS Process and $0.65{\mu}m$ CMOS model parameters. Moreover, it is researched delay time, power dissipation and duty ration distortion of the output voltage witch is proportional to the operating frequency for the proposed circuit.

• Journal of the Institute of Electronics and Information Engineers
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• v.53 no.1
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• pp.59-67
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• 2016

A novel instrumentation amplifier (IA) using fully-differential linear operational transconductance amplifier (FLOTA) for electronic measurement systems with low cost, wideband, and gain control with wide range is designed. The IA consists of a FLOTA, two resistor, and an operational amplifier(op-amp). The principal of the operating is that the difference of two input voltages applied into FLOTA converts into two same difference currents, and then these current drive resistor of (+) terminal and feedback resistor of op-amp to obtain output voltage. To verify operating principal of the IA, we designed the FLOTA and realized the IA used commercial op-amp LF356. Simulation results show that the FLOTA has linearity error of 0.1% and offset current of 2.1uA at input dynamic range ${\pm}3.0V$. The IA had wide gain range from -20dB to 60dB by variation of only one resistor and -3dB frequency for the 60dB was 10MHz. The proposed IA also has merits without matching of external resistor and controllable offset voltage using the other resistor. The power dissipation of the IA is 105mW at supply voltage of ${\pm}5V$.

• Journal of the Institute of Electronics Engineers of Korea TC
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• v.47 no.9
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• pp.1-8
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• 2010

A digital phase wrapping modulation (DPM) open-loop polar transmitter can be efficiently applied to a wideband orthogonal frequency division multiplexing (OFDM) communication system by converting in-phase and quadrature signals to envelope and phase signals and then employing the signal mapping process. This mapping process is very similar to quantization in a general communication system, and when taking into account the error that appears during mapping process, one can replace the coordinates rotation digital computer (CORDIC) algorithm in the coordinate conversion part with the Taylor series approximation method. In this paper, we investigate the application of the Taylor series approximation to the cartesian to polar coordinate conversion part of a DPM polar transmitter for wideband OFDM systems. The conventional approach relies on the CORDIC algorithm. To achieve efficient application, we perform computer simulation to measure mean square error (MSE) of the both approaches and find the minimum approximation order for the Taylor series approximation compatible to allowable error of the CORDIC algorithm in terms of hardware design. Furthermore, comparing the processing speeds of the both approaches in the implementation with FPGA reveals that the Taylor series approximation with lower order improves the processing speed in the coordinate conversion part.

• Journal of the Institute of Electronics Engineers of Korea TC
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• v.49 no.7
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• pp.56-64
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• 2012

A smart grid is the next generation power grid which combines the existing power grid with information technology, so an energy efficient power grid can be provided. In this paper, in order to build an efficient smart grid an AMI system, which gears with the existing home network and provides an user friendly management function, is proposed. The proposed AMI system, which is based on an extended home network, consists of various functional units; smart meters, communication modules, home gateway, security modules, meter data management modules (MDMM), electric power application modules and so on. The proposed home network system, which can reduce electric power consumption and transmit data more effectively, is designed by using IEEE 802.15.4. The extended home gateway can exchange energy consumption information with the outside management system via web services. The proposed AMI system is designed to enable two-way communication between the home gateway and MDMM via the Internet. The AES(Advanced Encryption Standard) algorithm, which is a symmetric block cipher algorithm, is used to ensure secure information exchange. Even though the results in this study could be limited to our experimental environment, the result of the simulation test shows that the proposed system reduces electric power consumption by 4~42% on average compared to the case of using no control.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.12 no.3
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• pp.432-438
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• 2001

In this paper, after applying Defected Ground Structure(DGS) to DC block, changes of gap and length of λ/4 coupled line are investigated by EM simulation and fabrication. As a result, on condition of the same output with the case using typical DC block, the gap between λ/4 coupled line is widen from 0.1 mm to 0.46 mm by 0.36 mm and the length of λ/4 coupled line gets shorter from 17.7 mm to 13.2 mm by 4.5 mm. Also three type power amplifiers using blocking capacitor, typical DC block and DGS DC block are fabricated and investigated. At first, when S parameter characteristics of each amplifier are considered at frequency band of 3.2 +-0.O5 GHz, every amplifier has similar characteristics of gain and S parameter. Second when the output power of amplifiers is 25 dBm after putting CW signal of 3.2 GHz into three type amplifiers, the difference of dominant signal and 2nd harmonic signal using blocking capacitor, typical DC block and DGS DC block is each -44.83 dBc, -66.84 dBc and -64.33 dBc. Therefore harmonic characteristics of amplifiers using typical DC block and DGS DC block is almost same.

• Journal of electromagnetic engineering and science
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• v.1 no.1
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• pp.73-77
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• 2001

We studied the fabrication of GaAs-based pseudomorphic high electron mobility transistors(PHEMT`s) for the purpose of millimeter- wave applications. To fabricate the high performance GaAs-based PHEMT`s, we performed the simulation to analyze the designed epitaxial-structures. Each unit processes, such as 0.1 m$\mu$$\Gamma$-gate lithography, silicon nitride passivation and air-bridge process were developed to achieve high performance device characteristics. The DC characteristics of the PHEMT`s were measured at a 70 $\mu$m unit gate width of 2 gate fingers, and showed a good pinch-off property ($V_p$= -1.75 V) and a drain-source saturation current density ($I_{dss}$) of 450 mA/mm. Maximum extrinsic transconductance $(g_m)$ was 363.6 mS/mm at $V_{gs}$ = -0.7 V, $V_{ds}$ = 1.5 V, and $I_{ds}$ =0.5 $I_{dss}$. The RF measurements were performed in the frequency range of 1.0~50 GHz. For this measurement, the drain and gate voltage were 1.5 V and -0.7 V, respectively. At 50 GHz, 9.2 dB of maximum stable gain (MSG) and 3.2 dB of $S_{21}$ gain were obtained, respectively. A current gain cut-off frequency $(f_T)$ of 106 GHz and a maximum frequency of oscillation $(f_{max})$ of 160 GHz were achieved from the fabricated PHEMT\\`s of 0.1 m$\mu$ gate length.h.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.24 no.1
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• pp.27-35
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• 2013

In this paper, a compact, broadband quasi-Yagi antenna utilizing balance analysis of the ultra-wideband microstrip-to-coplanar stripline(MS-to-CPS) balun is proposed. The antenna size was reduced by removing the reflector on bottom layer and ground plane is used as a reflector. A planar balun that transforms from microstrip(MS) to balanced coplanar stripline(CPS) is characterized in the amplitude and phase imbalances at CPS output ports are investigated and discussed. As compared with the conventional balun, the proposed MS-to-CPS balun demonstrated very wideband performance from 7 to over 20 GHz. From the simulation study, amplitude and phase imbalances are within 1 dB and ${\pm}5^{\circ}$, respectively. The implemented antenna provides very wide bandwidth from 6.9 to 15.1 GHz(74.5 %). The gain of the antenna is from 3.7 to 5.5 dBi, the front-to-back ratio is more than 10 dB, and the nominal radiation efficiency is about 94 %.

• The Journal of Korean Institute of Electromagnetic Engineering and Science
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• v.28 no.6
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• pp.487-496
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• 2017

Ground moving target indicator(GMTI) using syntheticaperture radar(SAR) used for finding moving targets on wide background clutter in short time is one of good ways to monitor a traffic situation or an enemy's threat. Although displaced phase center antenna (DPCA) is a real time method with low computational complexity, there have been few studies about its performance against various ground clutters. Thus, we need to analyze GMTI performance for various ground clutters in order to design a suitable DPCA detector. In this paper, simulation results show that the conventional DPCA detector produces different performance in terms of detection rate and false alarm rate. In particular, the false alarm rate of heterogeneous or extremely heterogeneous clutter from urban area is higher than one of homogeneous clutter from natural area.

• Journal of the Korea Concrete Institute
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• v.28 no.6
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• pp.673-683
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• 2016

In recent years, frequent terror or military attack by explosion, impact, fire accidents have occurred. Particularly, World Trade Center collapse and US Department of Defense Pentagon attack on Sept. 11 of 2001. Also, nuclear power plant incident on Mar. 11 of 2011. These attacks and incidents were raised public concerns and anxiety of potential terrorist attacks on major infrastructures and structures. Therefore, the extreme loading researches were performed of prestressed concrete (PSC) member, which widely used for nuclear containment vessel and gas tank. In this paper, to evaluate the blast resistance capacity and its protective performance of bi-directional unbonded prestressed concrete member, blast tests were carried out on $1,400{\times}1,000{\times}300mm$ for reinforced concrete (RC), prestressed concrete without rebar (PSC), prestressed concrete with rebar (PSRC) specimens. The applied blast load was generated by the detonation of 55 lbs ANFO explosive charge at 1.0 m standoff distance. The data acquisitions not only included blast waves of incident pressure, reflected pressure, and impulse, but also included displacement, acceleration, and strains at steel, concrete, PS tendon. The results can be used as basic research references for related research areas, which include protective design and blast simulation under blast loading.

• Journal of the Korea Institute of Information and Communication Engineering
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• v.18 no.7
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• pp.1505-1510
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• 2014

High-Pass (ETC ; Electronic Toll Collection) system is one of the basic elements, which adopts a wireless communication method using 5.8 GHz and can realize a part of ITS (Intelligent Traffic System). On the other hand, communication errors occur frequently in Hi-Pass system due to signal erros, multi-path reflection, and/or system-to-system interferences. To solve these problems, an EM (Electro-Magnetic) wave absorber can be used. To solve these Problems, we fabricated some samples in the different composition ratios of Carbon, Sendust, and CPE, and it was confirmed that the optimum composition ratio of Carbon : Sendust : CPE is 10 : 40 : 50 wt.%. The complex relative permittivity and complex relative permeability were derived by using the measured data. In addition, the optimum design parameters for the absorber were determined by simulation. Then the absorption abilities were calculated by changing the thickness of the EM wave absorbers. As a result, the optimum thickness of the developed EM wave absorber was 2.85 mm with absorption ability over 22.4 dB at 5.8 GHz. Futhermore, the EM wave absorber was fabricated based on the simulated and designed values. The measured values agreed well with the simulated ones. Therefore, it was clearly shown that the developed EM wave absorber in this paper is to be applied in actual situations.