• Electrical & Electronic Materials
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• v.8 no.6
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• pp.737-743
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• 1995

Two step RTD(Rapid Thermal Diffussion) of P into silicon wafer using tungsten halogen lamp was used to fabricated very shallow n$^{+}$p junction. 1st RTD was performed in the temperature range of 800.deg. C for 60 see and the heating rate was in the 50.deg. C/sec. Phosphrous solid source was transfered on the silicon surface. 2nd RTD process was performed in the temperature range 1050.deg. C, 10sec. Using 2 step RTD we can obtain a shallow junction 0.13.mu.m in depth. After RTD, the Ti-silicide process was performed by the two step RTA(Rapid Thermal Annealing) to reduced the electric resistance and to improve the n$^{+}$p junction diode. The titanium thickness was 300.angs.. The condition of lst RTA process was 600.deg. C of 30sec and that of 2nd RTA process was varied in the range 700.deg. C, 750.deg. C, 800.deg. C for 10sec-60sec. After 2 step RTA, sheet resistance was 46.ohm../[]. Ti-silicide n+p junction diode was fabricated and I-V characteristics were measured.red.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2010.06a
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• pp.343-343
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• 2010

In this paper, Schottky barrier thin-film-transistors (SB-TFTs) with platinum silicide at source/drain region based on glass substrate were fabricated. Poly-silicon on glass substrates was crystallized by excimer laser annealing (ELA) method. The formation of pt-silicide at source/drain region is the most important process for SB-TFTs fabrication. We study the optimal condition of Pt-silicidation on glass substrate. Also, we propose this device as promising structure in the future.

• Korean Journal of Materials Research
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• v.12 no.11
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• pp.883-888
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• 2002

We investigated the void formation in composite-titanium silicide($TiSi_2$) process. We varied the process conditions of polycrystalline/amorphous silicon substrate, composite $TiSi_2$ deposition temperature, and silicidation annealing temperature. We report that the main reason for void formation is the mass transport flux discrepancy of amorphous silicon substrate and titanium in composite layer. Sheet resistance in composite $TiSi_2$ without patterns is mainly affected by silicidation rapid thermal annealing (RTA) temperature. In addition, sheet resistance does not depend on the void defect density. Sheet resistance with sub-0.5 $\mu\textrm{m}$ patterns increase abnormally above $850^{\circ}C$ due to agglomeration. Our results imply that $sub-750^{\circ}C$ annealing is appropriate for sub 0.5 $\mu\textrm{m}$ composite X$sub-750_2$ process.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 1988.05a
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• pp.52-55
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• 1988

Tunsten silicide (WSix) films on polycrystalline silicon were formed by low-pressure chemical vapor deposition (LPCVD) and were annealed in $N_2$ for 30 mins at various temperatures. The annealing behaviors of tungsten silicide films have been investigated by electrical resistivity measurements, X-ray diffraction methods, scanning electron microscopy (SEM) and Hall measurements. The electrical resistivity decreased almost linearly with increasing annealing temperature and reached $35{\mu}{\Omega}-cm$ at $1000^{\circ}C$ annealing. The X-ray and SEM analyses indicate that crystallization of $WSi_2$ and grain growth occurs when annealed above $1000^{\circ}C$. Excess silicon redistribution occurs considerably when annealed above $1000^{\circ}C$. By Hall measurements, the carrier type for specimens annealed at $1000^{\circ}C$ was found to be positive holes, while the carriers were electrons in the specimens that were annealed at $800^{\circ}C$.

• The Journal of Korean Institute of Communications and Information Sciences
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• v.15 no.5
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• pp.399-405
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• 1990

Rapid Thermal Process(RTP) has been used to precisely control and study the reaction rate for the formation of refractory titanuium silicide. Samples were prepared by sputtering deposition layer of titanium on n-type, poly-deposit silicon wafers. The process were then sujected to a matrix of rapid time-temperature profile under nitrgen, argon gas ambient to precisely control the silicide formation. Reacted films were analyzed by the sheet resistance measursrement, SEM, ASR and X-ray diffraction. Results were shown that the resistivity of the silicide films are below 20u-cm and the thickness of silicide films are about two times than that of as-deposited titanium films. Silicidation ambient was likely to happen at the same tamperature-time condition for argon and nitrogen gas.

• Journal of the Korean Institute of Telematics and Electronics A
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• v.28A no.11
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• pp.887-893
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• 1991

To take advantage of Ti-polycide, when it is contacted with both n+ and p+ active area of silicon, the effects of BF$_2$ on the formation of Ti-silicide were investigated with RTA temperature and dopant concentration. The intermediate phase C49 TiSi$_2$ appeared at $650^{\circ}C$ and the stable phase C54 TiSi2 was formed at $700^{\circ}C$. And the formation of Ti-silicide was hindered by BF$_2$ doping and this trend was decreased with increasing temperature. The out-diffusion phenomena of BF$_2$ into Ti silicide were not observed. And significantly, the native oxide was a chief factor preventing the formation of Ti-silicides.

• Korean Journal of Metals and Materials
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• v.49 no.4
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• pp.321-328
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• 2011

The 30 nm-thick Ni layers was deposited on a flexible polyimide substrate with an e-beam evaporation. Subsequently, we deposited a Si layer using a catalytic CVD (Cat-CVD) in a hydride amorphous silicon (${\alpha}$-Si:H) process of $T_{s}=180^{\circ}C$ with varying thicknesses of 55, 75, 145, and 220 nm. The sheet resistance, phase, degree of the crystallization, microstructure, composition, and surface roughness were measured by a four-point probe, HRXRD, micro-Raman spectroscopy, FE-SEM, TEM, AES, and SPM. We confirmed that our newly proposed Cat-CVD process simultaneously formed both NiSi and crystallized Si without additional annealing. The NiSi showed low sheet resistance of < $13{\Omega}$□, while carbon (C) diffused from the substrate led the resistance fluctuation with silicon deposition thickness. HRXRD and micro-Raman analysis also supported the existence of NiSi and crystallized (>66%) Si layers. TEM analysis showed uniform NiSi and silicon layers, and the thickness of the NiSi increased as Si deposition time increased. Based on the AES depth profiling, we confirmed that the carbon from the polyimide substrate diffused into the NiSi and Si layers during the Cat-CVD, which caused a pile-up of C at the interface. This carbon diffusion might lessen NiSi formation and increase the resistance of the NiSi.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.16 no.4
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• pp.280-285
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• 2003

The influence of silicon surface damage on nickel-silicide (NiSi) has been characterized and H$_2$ anneal and TiN rapping has been applied to suppress the electrical, morphological deterioration phenomenon incurred by the surface damage. The substrate surface is intentionally damaged using Ar IBE (Ion beam etching) which can Precisely control the etch depth. The sheet resistance of NiSi increased about 18% by the surface damage, which is proven to be mainly due to the reduced silicide thickness. It is shown that simultaneous application of H: anneal and TiN capping layer is highly effective in suppressing the surface damage effect.

• Proceedings of the KIEE Conference
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• 1987.07a
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• pp.454-457
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• 1987

Formation of the titanium silicides was performed by the furnace annealing. Ti-silicide was formed by reacting Ti films with singlecrystalline silicon in vacuum or nitrogen ambient in the temperature range $500{\sim}900^{\circ}C$. The Ti-Si interaction in such films was investigated by using X-ray diffraction, and sheet resistance measurements. It was found that the dorminant crystal phase of silicide formed during annealing at $600{\sim}700^{\circ}C$ was TiSi, and $TiSi_2$ phase is associated with a very low sheet resistance(<$2{\Omega}/{\Box}$).

• Korean Journal of Materials Research
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• v.2 no.5
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• pp.375-382
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• 1992

Molybdenum silicide films have been prepared by sputtering from a single composite MoS$i_2$ source on both P, B$F_2$respectively implanted (5${\times}10^{15}ions/cm^2$ single crystal and P implanted (5${\times}10^{15}ions/cm^2$) polycrystalline silicon substrates followed by rapid thermal annealing in the ambient of argon. The heat treatment temperatures have been varied in the range of 600-l20$0^{\circ}C$ for 20 seconds. The properties of Mo-silicide and the diffusion behaviors of dopant after the heat treatment are investigated using X-ray diffraction, scanning electron microscopy(SEM) , secondary ions mass spectrometry(SIMS), four-point probe and $\alpha-step.$ Annealing at 80$0^{\circ}C$ or higher resulted in conversion of the amorphous phase into predominantly MoS$i_2$and a lower sheet resistance. There was no significant out-diffusion of dopants from both single crystal and polycrystalline silicon substrate into molybdenum silicide layers during annealing.