• Current Optics and Photonics
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• 제6권3호
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• pp.236-243
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• 2022

Monocrystalline silicon has excellent properties, but it is difficult to design and manufacture silicon-based mirrors that can meet engineering applications because of its hard and brittle properties. This paper used monocrystalline silicon as the main mirror material in an imaging system to carry out a feasibility study. The lightweight design of the mirror is completed by the method of center support and edge cutting. The support structure of the mirror was designed to meet the conditions of wide temperature applications. Isight software was used to optimize the feasibility sample, and the optimized results are that the root mean square error of the mirror surface is 3.6 nm, the rigid body displacement of the mirror is 2.1 ㎛, and the angular displacement is 2.5" under the conditions of a temperature of ∆20 ℃ and a gravity load of 1 g. The optimized result show that the silicon-based mirror developed in this paper can meet the requirements of engineering applications. This research on silicon-based mirrors can provide guidance for the application of other silicon-based mirrors.

• Current Optics and Photonics
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• 제4권6호
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• pp.551-557
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• 2020

A mirror-in-slab waveguide is fabricated on a slab waveguide by using the refractive-index contrast between two materials, with the reflection performance depending on the slab waveguide's design. In this research, a slab waveguide design consisting of silicon (Si) as the core and SiO2 as the substrate was designed and developed to determine the coupling, waveguide, and mirror losses. Based on experimental results, coupling loss is dominant and is affected by the design of the slab waveguide. Furthermore, the mirror loss is affected by the design of the mirror, such as the curvature radius and the size of the mirror. TE and TM polarizations of light are used in the measurements. The experimental results show that mirror losses due to reflection by mirrors are 0.011 dB/mirror and 0.007 dB/mirror for TE and TM polarizations respectively. A simulation was performed to confirm whether the size of mirror is sufficient to reflect the input light, and to check the quality of the surfaces of fabricated mirrors.

• 대한전기학회:학술대회논문집
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• 대한전기학회 2007년도 Techno-Fair 및 추계학술대회 논문집 전기물성,응용부문
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• pp.150-151
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• 2007

We present an one-axis parallel-plate type of bulk micromachined torsional micromirror array with single crystalline silicon (SCS) fabricated on the glass substrate. Structurally, bottom electrodes (amophous silicon) in this mirror are DRIEed along the aluminum mirror patterns on SCS, which are self-aligned with mirror plates. Tracing the history of the micromirror study, we found that few papers have been published on research for uniform driving voltages based upon the tilting direction. If there is a slight misalignment during anodic bonding between top (mirror plate) and bottom electrodes, the non-uniformity of driving voltage will be led depending on two different tilting direction. This paper discusses how much the pull-in voltages can be different due to misalignment between two electrodes. Moreover, We achieve uniform pull-in voltage regardless of misalignments in photolithography and anodic-bonding between two individual layers.

• Journal of Information Display
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• 제3권3호
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• pp.35-43
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• 2002

Silicon-based 0.69-inch AMOEL microdisplay with integrated driver and timing controller circuits for microdisplay applications has been developed using 0.35 ${\mu}m$ l-poly 4-metal standard CMOS process with 5 V CMOS devices and CMP (Chemical Mechanical Polishing) technology. To reduce the large data programming time consumed in a conventional current programming pixel circuit technique and to achieve uniform display, de-amplifying current mirror pixel circuit and the current-mode data driver circuit with threshold roltage compensation are proposed. The proposed current-mode data driver circuit is inherently immune to the ground-bouncing effect. The Monte-Carlo simulation results show that the proposed current-mode data driver circuit has channel-to-channel non-uniformity of less than ${\pm}$0.6 LSB under ${\pm}$70 mV threshold voltage variaions for both NMOS and PMOS transistors, which gives very good display uniformity.

• 대한전기학회:학술대회논문집
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• 대한전기학회 1997년도 추계학술대회 논문집 학회본부
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• pp.612-614
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• 1997

Silicon based micro mirror array is a highly efficient component for use in optical applications such as adaptive optical systems and optical correlators. A micro mirror array designed, fabricated and tested here is consisted of $5{\times}5$ single layer polysilicon, electrostatically driven actuators. In this paper, deflection characteristics and pull-in behavior of the actuators for analog control was studied and particularly, the influence of the residual stress in flexure beams for the restorative force of actuators was considered. The springs are modeled as a residual stress-free spring and a spring with residual stress. In calculation, a mirror with the residual stress-free springs has 30.3N/m spring constant and 31.1V pull-in voltage. On the other hand, a mirror with the stressed springs has 23.6N/m and 27.4V respectively. The experimental result, which is 20.5N/m and 25.5V, shows that the stressed springs ore well modeled.

• Journal of the Optical Society of Korea
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• 제7권4호
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• pp.230-233
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• 2003

This study describes the conceptual design of a soft x-ray microscope system based on a laserbased source for biomedical application with high resolution (${\leq}$50nm). The laboratory scale soft x-ray microscope consists of high power laser plasma x-ray source and grazing incidence mirrors with high reflectivity. The laser plasma source used for developing this system employs Q-switched Nd-YAG pulsed laser. The laser beam is focused on a tantalum (Ta) target. The Wolter type I mirror was used as condenser optics for sample illumination and as objective mirror for focusing on a detector. The fabrication of the Wolter type I mirror was direct internal cutting using ultraprecision DTM. A hydrated biological specimen was put between the two silicon wafers, the center of which was $Si_3N_4$ windows of 100㎚ thickness. The main issues in the future development work are to make a stable, reliable and reproducible x-ray microscope system.

• 한국산학기술학회논문지
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• 제4권1호
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• pp.47-49
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• 2003

태양전지에 소모되는 비용중의 30% 이상이 silicon 기판의 가공 및 silicon자체의 비용이다. 본 연구에서는 이러한 비운을 절감하기 위해 silicon기판대신 STS 304를 사용하고자 한다. STS 304를 태양전지용 기판으로 사용하기 위해서는 고도천 연마된 표면을 필수조건으로 하기 때문에 STS 304에 전해연마를 실시하여 AFM으로 표면의 거칠기를 살펴보았다 또 한, 표면 조도의 향상을 위해 최적의 연마조건에서 leveller를 첨가하였다. 인산($H_3PO_4$)을 기본으로 한 전해연마액에 2A의 전류와 극간거리 0.7cm의 조건하에서 STS 304의 최적 전해연마조건을 찾기 위해 전해액의 온도는 $80^{\circ}C{\sim}120^{\circ}C$, 연마시간은 3~2분간 전해연마를 실시하였다. 그 결과 2A/$cm^2$, $80^{\circ}C$, 10분에서 27.9nm의 표면조도를 보였으며, leveller로 사용된 glycerine, ethylene glycol, propylene glycol의 영향을 연구하였다. Leveller 중에서는 ethylene glycol을 0.4g/l 첨가하였을 때 표면조도가 약 15nm로서 그 효과가 가장 좋았다.

• 한국정밀공학회지
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• 제9권2호
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• pp.22-28
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• 1992

This paper is studied about the method to measure the fine scratches on the mirror surfaces, such as the silicon wafer and magnetic memory disk by the optical measuring method. The theoretical background of this analysis is based upon the light scattering theory developed by Beckmann. In this analysis, the roughness in fine scratches is not considered because the aberage roughness is very small compared with the size of fine scratches. Empasis is on quantilaive method of fine scratches by non-contact method. Experiments are followed by the image processing system attached to the CCD Camera. As a results, I propose the new method to measure the size of the fine scratches from the parameters obtained by the computer simulation and experiments.

• 대한전기학회:학술대회논문집
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• 대한전기학회 2007년도 심포지엄 논문집 정보 및 제어부문
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• pp.196-198
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• 2007

A circuit design technique to reduce the propagation time is proposed for the analog parallel processing-based Viterbi decoder. The analog Viterbi decoder implements the function of the conventional digital Viterbi decoder utilizing the analog parallel processing circuit technology. The decoder is for the PR(1.2,2.1) signal of DVD. The benefits are low power consumption and less silicon occupation. In this paper, a propagation time reduction technique is proposed by minimizing the parasitic capacitance components in the layout design of the analog Viterbi decoder. The propagation time reduction effect of the proposed technique has been shown via HSPICE simulation.

• JSTS:Journal of Semiconductor Technology and Science
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• 제15권6호
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• pp.658-663
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• 2015

In the previous work, we have proposed an integrate-and-fire neuron circuit and synaptic device based on the floating body MOSFET [1-3]. Integrate-and-Fire(I&F) neuron circuit emulates the biological neuron characteristics such as integration, threshold triggering, output generation, refractory period using floating body MOSFET. The synaptic device has short-term and long-term memory in a single silicon device. In this paper, we connect the neuron circuit and the synaptic device using current mirror circuit for summation of post synaptic pulses. We emulate spike-timing-dependent-plasticity (STDP) characteristics of the synapse using feedback voltage without controller or clock. Using memory device in the logic circuit, we can emulate biological synapse and neuron with a small number of devices.