• Transactions on Electrical and Electronic Materials
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• v.7 no.3
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• pp.118-122
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• 2006

Diamond-like carbon (DLC) films were prepared on silicon substrates by the RF PECVD (Plasma Enhanced Chemical Vapor Deposition) method using methane $(CH_4)$ and hydrogen $(H_2)$ gas. We examined the effects of the post annealing temperature on the tribological properties of the DLC films using friction force microscopy (FFM). The films were annealed at various temperatures ranging from 300 to $900^{\circ}C$ in steps of $200^{\circ}C$ using RTA equipment in nitrogen ambient. The thickness of the film was observed by scanning electron microscopy (SEM) and surface profile analysis. The surface morphology and surface energy of the films were examined using atomic force microscopy and contact angle measurement, respectively. The hardness of the DLC film was measured as a function of the post annealing temperature using a nano-indenter. The tribological characteristics were investigated by atomic force microscopy in FFM mode.

• Journal of the Semiconductor & Display Technology
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• v.3 no.3
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• pp.45-50
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• 2004

Highly oriented diamond (HOD) films in polycrystalline can be grown on the (100) silicon substrate by microwave plasma CVD. Bias enhanced nucleation (BEN) method was adopted for highly oriented diamond deposition with high nucleation density and uniformity. The substrate was biased up to -250[Vdc] and bias time required for forming a diamond film was varied up to 25 minutes. Diamond was deposited by using $\textrm{CH}_4$/CO and $H_2$ mixture gases by microwave plasma CVD. Nucleation density and degree of orientation of the diamond films were studied by SEM. Thermal conductivity of the diamond films was ∼5.27[W/cm.K] measured by $3\omega$ method.

• Electrical & Electronic Materials
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• v.7 no.3
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• pp.206-212
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• 1994

In this paper, We discuss the $POCI_3$ doping process according to the variation of deposition temperature, gas flow rate and doping time. The factors acted with $POCI_3$ doping are gas flow rate deposition temperature and time etc. Among them the temperature is the most important factor. For the $POCI_3$ flow rate, it should not exceed the resistivity saturation point developed on poly surface by annealing treatment. Therefore, this study suggests the optimum conditions of Poly-silicon treatments with the $POCI_3$ flow rate.

• Proceedings of the Korean Institute of Surface Engineering Conference
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• 2008.11a
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• pp.59-60
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• 2008

산화실리콘 박막은 생체적합성, 폴리머 필름의 gas barrier, 저유전율, 환경차단 보호막 등 다양한 특성을 갖고 있어 연구개발이 활발하게 이루어지고 있다. 본 연구는 저진공 화학기상증착법 (LPCVD)를 이용하여 산화실리콘 박막을 제작하였다. 실리콘 박막을 위한 전구체는 환경 친화적이며 상온에서 비교적 높은 증발점을 갖는 hexamethyldisiloxane (HMDSO)을 이용하였으며, 이때 기판은 실리콘을 이용하였다. LPCVD의 공정변수는 전구체 공급량(진공도)과 RF power를 중심으로하여 Taguchi 실험계획법에 따라 박막을 제작하였다. 또한, 실험계획법에 의해 최적 전구체 공급량과 RF power를 결정하고 산소분압의 변화에 따른 산화실리콘 박막을 제작하였다. 산화실리콘 박막은 표면특성 및 화학적 결합상태를 수접촉각, SEM, AFM, FTIR 등을 이용하여 관찰하고 분석하였다.

• Proceedings of the KIEE Conference
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• 2004.11a
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• pp.92-94
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• 2004

In this investigation, 3C-SiC film deposited $1000{\AA}$ on the p-type silicon wafer which is resistance $0{\sim}30[{\Omega}{\cdot}cm]$ by PECVD (Plasma-enhanced Chemical Vapor Deposition). We deposited Cr, Ta, Pt in front of wafer to utilize DC-sputter for $500{\AA}$, the SiC Schottky diode made from Al ohmic contact about $4000{\AA}$, and to each different temperature which annealing in Ar atmosphere, we had forward characteristic analysis along to annealing temperature.

• Proceedings of the Korean Society of Tribologists and Lubrication Engineers Conference
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• 2000.11a
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• pp.18-22
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• 2000

An experimental study was carried out to investigate the effect of nano-contact condition on the nano-adhesion phenomena. SPM(scanning probe microscope) tips with different radius of curvature were fabricated by a series of masking and etching processes. DLC(diamond-like carbon) and W-DLC (tungsten-incorporated diamond-like carbon) were coated on (100) silicon wafer by PACVD(plasma assisted chemical vapor deposition). Pull-off forces of Pure Si-wafer, DLC and W-DLC were measured with SPM(scanning probe microscope). Also, the same series of tests were carried out with the tips with different radius of curvature. Results showed that DLC and W-DLC showed much lower pull-off force than Si-wafer and Pull-off force increased with the tip radius.

• Proceedings of the Korean Vacuum Society Conference
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• 2010.02a
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• pp.130-130
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• 2010

Thin Si films were grown by a plasma-enhanced chemical vapor deposition (PECVD, SNTEK, Korea) system. Two different deposition condition were applied and formed a fully amorphous Si (a-Si) film and a micromorph mixing of microcrystalline Si (mc-Si) and a-Si film. Under one sun illumination, the micromorph device provided the enhanced open circuit voltage and fill factor values. It presents the fabrication of the micromorph Si film and the a-Si film by modulating a deposition condition. The performances of the Si thin film Schottky solar cells are discussed.

• Proceedings of the Korean Institute of Surface Engineering Conference
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• 2007.04a
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• pp.87-88
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• 2007

나노 다결정 실리콘 박막 증착을 하기 위해서 현재 정전결합플라즈마(CCP, Capacitively Coupled Plasma)를 이용한 PECVD(Plasma Enhanced Chemical Vapor Deposition) 공정에 관한 여구가 활발히 이루어지고 있다. 유도결합플라즈마는(ICP, Inductively Coupled Plasma) 정전결합플라즈마보다 플라즈마 밀도가 높고 파워전달 효율이 좋은 것으로 알려져 있으나 대면적가 어려워 기판이 큰 TFT-LCD로는 많이 연구되고 있지 않다. 본 연구는 유도결합플라즈마를 위해 내장형 multiple U-type 선형 안테나를 이용하여 나노 다결정 실리콘 박막을 증착하여 그 특성을 분석하였다.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.36 no.2
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• pp.109-124
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• 2023

For decades, sputtering as a physical vapor deposition (PVD) method has been a widely used technique for film coating processes. The sputtering enables oxides, metals, alloys, nitrides, etc to be deposited on a wide variety of substrates from silicon wafers to polymer substrates. Meanwhile, transparent conductive oxides (TCOs) have played important roles as electrodes in electrical applications such as displays, sensors, solar cells, and thin-film transistors. TCO films fabricated through a sputtering process have a higher quality leading to an improved device performance than other films prepared with other methods. In this review, we discuss the mechanism of sputtering deposition and detail the TCO materials. Related technologies (processing conditions, materials, and applications) are introduced for electrical applications.

• Korean Journal of Materials Research
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• v.17 no.1
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• pp.31-36
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• 2007

Nanoimprint lithography (NIL) is a new lithographic method that offers a sub-10nm feature size, high throughput, and low cost. One of the most serious problems of NIL is the stiction between mold and resist. The antistiction layer coating is very effective to prevent this stiction and ensure the successful NIL results. In this paper, an antistiction layer was deposited by VSAM (vapor self assembly monolayer) method on silicon samples with FOTS (perfluoroctyltrichlorosilane) as a precursor for making an antistiction layer. A specially designed LPCVD (low pressure chemical vapor deposition) was used for this experiment. All experiments were achieved after removing the humidity. First, the evaporation test of FOTS was performed for checking the evaporation temperature at low pressure. FOTS was evaporated at 5 Tow and $110^{\circ}C$. In order to evaluate the temperature effect on antistiction layer, chamber temperature was changed from 50 to $170^{\circ}C$ with 0.1ml of FOTS for 1 minute. Good hydrophobicity of all samples was shown at about $110^{\circ}$ of contact angle and under $20^{\circ}$ of hysteresis. The surface energies of all samples calculated by Lewis acid/base theory was shown to be about 15mN/m. The deposited thicknesses of all samples measured by ellipsometry were almost 1nm that was similar value of the calculated molecular length. The surface roughness of all samples was not changed after deposition but the friction force showed relatively high values and deviations deposited at under $110^{\circ}$. Also the white circles were founded in LFM images under $110^{\circ}$. High friction forces were guessed based on this irregular deposition. The optimized VSAM process for FOTS was achieved at $170^{\circ}C$, 5 Torr for 1 hour. The hot embossing process with 4 inch Si mold was successfully achieved after VSAM deposition.