• Journal of the Korean Institute of Telematics and Electronics A
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• v.32A no.3
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• pp.134-142
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• 1995

We discovered that each distinct shape of the roof-shaped peaks of (111) facets, which are generated on (110) cross-section of the directly bonded (100) silicon wafer pairs after KOH etching, can be mapped to one of three conditions of the interfacial oxide existing at the bonding interface as follows. That is, thick solid line can be mapped to stabilization, thin solid line to disintegration, and thin broken line to spheroidization. also we confirmed that most of the interfacial oxides of a well-aligned wafer pairs were disintegrated and spheroidized through high-temperature annealing process above 900$^{\circ}$C while the oxide was stabilized persistently when two wafers are bonded rotationally around their common axis perpendicular to the wafer planes.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 1992.11a
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• pp.3-6
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• 1992

A new analytical expression for the saturated I-V characteristics of hydrogenerated amorphous silicon thin film transistors(a-si:H TFT) is presented and experimentally verified. The results show that the experimental transfer and output characteristics at several temperatures are easily modeled. The model is based on three functions obtained from the experimental data of $I_D$ versus $V_G$. Theoretical results confirm the simple form of the model in terms of the device geometry. It was determined that the saturated drain current increased at a fixed gate voltage and the device saturated at increasingly larger drain voltages while the threshold voltages decreased.

• Proceedings of the KIEE Conference
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• 2006.04a
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• pp.138-140
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• 2006

A new diagnosis model was constructed by combining atomic force microscopy (AFM), wavelet, and neural network. Plasma faults were characterized by filtering AFM-measured etch surface roughness with wavelet. The presented technique was evaluated with the data collected during the etching of silicon oxynitride thin film. A total of 17 etch experiments were conducted. Applying wavelet to AFM, surface roughness was detailed into vertical, horizon%at, and diagonal components. For each component, neural network recognition models were constructed and evaluated. Comparisons revealed that the vertical component-based model yielded about 30% improvement in the recognition accuracy over others. The presented technique was evaluated with the data collected during the etching of silicon oxynitride thin film. A total of 17 etch experiments were conducted

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 1996.05a
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• pp.220-223
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• 1996

Mechanical properties of Plasma-Enhanced Chemical Vapor Deposited (PECVD) silicon nitride thin film was studied to determine the feasibility of the film as a passivation layer over the aluminum bonding areas of integrated circuit chips. Ultimate strain of the films in thicknesses of about 5 k${\AA}$ was measured using four-point bending method. The ultimate strain of these films was constant at about 0.2% regardless of residual stress. Intrinsic and residual stresses of these films were measured and compared with thermal shock and cycling test results. Comparison of the results showed that more tensile films were more susceptible to crack- induced failure.

• Journal of the Korean Vacuum Society
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• v.6 no.1
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• pp.44-49
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• 1997

AIN thin films were deposited on silicon and glass substrates by sputtering Al target and introducing mixed gases of argon and nitrogen into reactive RF magnetron sputter. The substrate was not heated to protect the PC (polycarbonate) substrate and the micro-sized pregroove morphology on the surface of PC substrate. But its temperature was around $100^{\circ}C$ due to the self-heating by plasma. The crystallinity, cross-section morphology and refractive index were characterized by changing various deposition parameters.

• 한국정보디스플레이학회:학술대회논문집
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• 2000.01a
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• pp.15-16
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• 2000

The gate bias stress effect of the hydrogenated amorphous silicon (a-Si:H) thin-film transistors (TFTs) with a $SiN_x/BCB$ gate insulator have been studied. The gate planarization was carried out by spin-coating of BCB (benzocyclobutene) on Cr gates. The BCB exhibits charge trappings during a high gate bias, but the stability of the TFT is the same as conventional one when it is between -25 V and +25 V. The charge trap density in the BCB increases with its thickness.

• Journal of the Korean Institute of Telematics and Electronics
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• v.27 no.9
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• pp.1402-1408
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• 1990

We studied the electrical, optical and structural properties of microcrystalline silicon thin films prepared by a new chemical vapour deposition technique, called filament assisted(FA)-CVD. The microcrystalline silicon is sucessfully deposited when the hydrogen dilution ratio exceeds 30. The Raman peak at 520 cm-1 and the X-ray diffraction peak at 27.7\ulcorner0.2\ulcornerbecome sharper with increasing hydrogen dilution ratio. We obtain high quality microcrystalline Si by FA-CVD with optical gap of \ulcorner2.2eV and hydrogen content of \ulcorner3 at %.

• Journal of the Semiconductor & Display Technology
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• v.6 no.2 s.19
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• pp.15-18
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• 2007

Effects of $O_2$ flow during deposition on Si crystallization at low substrate temperature were studied. Silicon thin films were prepared on $SiO_2$ substrates in a low-pressure chemical vapor deposition chamber using a mixture of $SiH_4$ and $H_2$. In some cases $O_2$ was intentionally introduced during deposition. Growth of poly silicon was observed at the substrate temperature as low as $480^{\circ}C$ when $O_2$ was flowed during deposition implying that crystallization of Si was enhanced by $O_2$ flow. On the other hand, $O_2$ flow did not show any significant effects at higher substrate temperature, where deposition rate is relatively fast. Enhancement mechanism of Si crystallization by $O_2$ flow was suggested from these results.

• The Transactions of the Korean Institute of Electrical Engineers
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• v.43 no.6
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• pp.951-957
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• 1994

We present a new model for the series resistance of inverted-staggered amorphous silicon (a-Si) thin film transistors (TFT's) by employing the current spreading under the source and the drain contacts as well as the space charge limited current model. The calculated results based on our model have been in good agreements with the measured data over a wide range of applied voltage, gate-to-source and gate-to-drain overlap length, channel length, and operating temperature. Our model shows that the contribution of the series resistances to the current-voltage (I-V) characteristics of the a-Si TFT in the linear regime is more significant at low drain and high gate voltages, for short channel and small overlap length, and at low operating temperature, which have been verified successfully by the experimental measurements.

• Proceedings of the Korean Institute of Surface Engineering Conference
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• 2013.05a
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• pp.109-110
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• 2013

Medium carbon steel was aluminized by hot dipping into molten Al or Al-1%Si baths. After hot-dipping in these baths, a thin Al-rich topcoat and a thick alloy layer rich in $Al_5Fe_2$ formed on the surface. A small a mount of FeAl and $Al_3Fe$ was incorporated in the alloy layer. Silicon from the Al-1%Si bath was uniformly distributed throughout the entire coating. The hot dipping increased the microhardness of the steel by about 8 times. Heating at $700-1000^{\circ}C$ however decreased the microhardness through interdiffusion between the coating and the substrate. The oxidation at $700-1000^{\circ}C$ in air formed a thin protective ${\alpha}-Al_2O_3$ layer, which provided good oxidation resistance. Silicon was oxidized to amorphous silica, exhibiting a glassy oxide surface.