• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2001년도 하계학술대회 논문집
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• pp.855-858
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• 2001

The stress induced leakage currents of thin silicon oxides is investigated in the VLSI implementation of a self learning neural network integrated circuits using a linearity synapse transistor. The channel current for the thickness dependence of stress current, transient current, and stress induced leakage currents has been measured in oxides with thicknesses between 41 ${\AA}$, 86${\AA}$, which have the channel width ${\times}$ length 10 ${\times}$1${\mu}$m, 10 ${\times}$0.3${\mu}$m respectively. The stress induced leakage currents will affect data retention in synapse transistors and the stress current, transient current is used to estimate to fundamental limitations on oxide thicknesses. The synapse transistor made by thin silicon oxides has represented the neural states and the manipulation which gaves unipolar weights. The weight value of synapse transistor was caused by the bias conditions. Excitatory state and inhitory state according to weighted values affected the channel current. The stress induced leakage currents affected excitatory state and inhitory state.

• 한국고분자학회:학술대회논문집
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• 한국고분자학회 2006년도 IUPAC International Symposium on Advanced Polymers for Emerging Technologies
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• pp.311-311
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• 2006

The morphology of Poly(styrene-b-methylmethacrylate) (P(S-b-MMA)) block copolymer thin films deposited on silicon wafers was controlled by treating the substrates with Self-Assembled Monolayers (SAM) of phenylsilanes with different alkyl chain lengths. It was found that the treatment with SAM strongly modified the substrates properties, especillay the surface energy, as compared with bare silicon oxide. By futher adjusting the molecular weight of P(S-b-MMA), a variety of morphologies could be generated, including a perpendicular orientation of lamellea of PS and PMMA, which is required for industrial applications.

• 한국정보디스플레이학회:학술대회논문집
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• 한국정보디스플레이학회 2006년도 6th International Meeting on Information Display
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• pp.505-508
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• 2006

Self-heating induced device degradation and its width/length (W/L) dimension dependence were studied in p-type polycrystalline silicon (poly-Si) thin film transistors (TFTs). Negative channel conductance was observed under high power region of output curve, which was mainly caused by hole trapping into gate oxide and also by trap state generation by self-heating effect. Self-heating effect became aggravated as W/L ratio was increased, which was understood by the differences in heat dissipation capability. By reducing applied power density normalized to TFT area, self-heating induced degradation could be reduced.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2002년도 춘계학술대회 논문집 디스플레이 광소자 분야
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• pp.38-41
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• 2002

The variation of photoluminescence(PL) properties of Si thin films was investigated by changing deposition temperatures, Si-rich silicon oxide films on p-type (100) Si substrate have been fabricated by pulsed laser deposition(PLD) technique using a Nd:YAG laser. During deposition, the substrates were kept at the temperature range of room temperature(RT) to $400^{\circ}C$. After deposition, samples were annealed at $800^{\circ}C$ in nitrogen ambient, Strong Blue PL has been observed on RT-deposited Si nanocrystallites. When the deposition temperature was increased over $100^{\circ}C$, PL intensities abruptly decreased. The experimental results show the growing mechanism of Si nanocrystallites by PLD.

• 전자공학회논문지A
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• 제33A권5호
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• pp.117-124
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• 1996

The .mu.c-Si:H films have been deposited by PeCVD at the various conditions such as hydrogen dilution ratio, substrate temperature and RF power density. Then, we studied their electrical and optical properties. Top gate hydrogenated micro-crystalline silicon thin film transistors($\mu$c-Si:H TFTs) using $\mu$-Si:H and a-SiN:H films have been fabricated by FECVD. The electrical characteristics of the devices have been investigated by semiconductor parameter analyzer and compared with amorphous silicon thin film transistors (a-Si:H TFTs). In this study, on/off current ratio, threshold voltage and the field effect mobility of the $\mu$c-Si:H TFT were $3{\times}10^{4}$, 5.06V and 0.94cm$^{2}$Vs, respectively.

• ETRI Journal
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• 제24권5호
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• pp.398-400
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• 2002

Using $Cr_2O_3$ thin film, we developed a novel etch-stop technique for the protection of silicon surface morphology during deep ion coupled plasma etching of silica layers. With this technique we were able to etch a silica trench with a depth of over 20 ${\mu}m$ without any damage to the exposed silicon terrace surface. This technique should be well applicable to fabricating silica planar lightwave circuit platforms for opto-electronic hybrid integration.

• 대한기계학회:학술대회논문집
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• 대한기계학회 2003년도 춘계학술대회
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• pp.1407-1411
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• 2003

Due to the heat confinement in the shallow region of the target for a short time scale, pulsed laser annealing has received increasing interest for the fabrication of poly-Si thin film transistors(TFTs) on glass as a low cost substrate in the flat panel displays. The formation and growth mechanisms of poly silicon(poly-Si) grains in thin films are investigated using an excimer laser crystallization system. To understand the crystallization mechanism, the grain formations are observed by FESEM analysis. The optical reflectance and transmittance during the crystallization process are measured using HeNe laser optics. A two-step ELC(Excimer Laser Crystallization) process is applied to enhance the grain formation uniformity.

• 한국레이저가공학회지
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• 제6권2호
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• pp.9-17
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• 2003

Due to the heat confinement in the shallow region of the target for a short time scale, pulsed laser annealing has received an increasing interest for the fabrication of poly-Si thin film transistors(TFTs) on glass as a low cost substrate in the flat panel displays. The formation and growth mechanisms of poly silicon(poly-Si) grains in thin films are investigated using an excimer laser crystallization system. To understand the crystallization mechanism, the grain formations are observed by FESEM photography. The optical reflectance and transmittance during the crystallization process are measured using HeNe laser optics. A two-step ELC(Excimer Laser Crystallization) process is applied to enhance the grain formation uniformity.

• 전자공학회논문지D
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• 제34D권4호
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• pp.33-39
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• 1997

The crystallization temperature of an amorphous silicon (a-Si) can be lowered down to 400.deg. C by a new method : Double-metal induced lateral crystallization (DMILC). The a-Si film was laterally crystallized from Ni and Pd deposited area, and its lateral crystallization rate reaches up to 0.2.mu.m/hour at that temperature and depends on the overlap length of Ni and Pd films; the shorter the overlap length, the faster the rate. Poly-Silicon thin film transistors (poly-Si TFT's) fabricated by DMILC at 400.deg. C show a field effect mobility of 38.5cm$^{3}$/Vs, a minimum leakage current of 1pA/.mu.m, and a slope of 1.4V/dec. The overlap length does not affect the characteristics of the poly-Si TFT's, but determines the lateral crystallization rate.

• 한국세라믹학회지
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• 제28권11호
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• pp.859-864
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• 1991

High quality lead titanate thin films were fabricated by spin coating on a silicon substrate. The resulting dried gel layers were uniform in thickness through 2$\times$2 $\textrm{cm}^2$ area, and polycrystalline perovskite structures developed almost crack free with a heat treatment above 50$0^{\circ}C$ in films with thickness above 360 nm. Metastable pyrochlore structures were observed in films with thickness of 160 nm when heat treated at 500 and $600^{\circ}C$, but these structure did not appear in films with thickness of 360 nm. The thickness dependence in crystal structure of films was studied. by varying the substrate condition and analyzing the interface between the film and substrate. In native oxide films on silicon stbstrates, amorphous dried gel layers were heterogeneously nucleated. Metastable cubic pyrochlore structure could be crystallized in amorphous native oxide.