• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 2002년도 하계학술대회 논문집
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• pp.387-390
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• 2002

This paper presents deposition and characterizations of microcrystalline silicon(${\mu}$c-Si:H) films prepared by hot wire chemical vapor deposition at substrate temperature below 300$^{\circ}C$. The SiH$_4$ concentration[F(SiH$_4$)/F(SiH$_4$).+(H$_2$)] is critical parameter for the formation of Si films with microcrystalline phase. At 6% of silane concentration, deposited intrinsic ${\mu}$c-Si:H films shows sufficiently low dark conductivity and high photo sensitivity for solar cell applications. P-type ${\mu}$c-S:H films deposited by Hot-Wire CVD also shows good electrical properties by varying the rate of B$_2$H$\_$6/ to SiH$_4$ gas. The solar cells with structure of Al/nip ${\mu}$c-Si:H/TCO/g1ass was fabricated with single chamber Hot-Wire CVD. About 3% solar efficiency was obtained and applicability of HWCVD for thin film solar cells was proven in this research.

• 한국전기전자재료학회논문지
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• 제21권9호
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• pp.848-852
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• 2008

Characteristics of microcrystalline-silicon thin-films deposited by plasma-enhanced chemical-vapor deposition (PECVD) method were studied. There were optimum values of RF power density and $H_2$ dilution ratio $(H_2/(SiH_4+H_2))$; maximum grain size of about 35 nm was obtained at substrate temperature of 250 $^{\circ}C$ with RF power density of 1.1 W/$cm^2$ and $H_2$ dilution ratio of 0.91. Larger grain was obtained with higher substrate temperature up to 350 $^{\circ}C$. Grain size dependence on RF power density and $H_2$ dilution ratio could be explained by etching effects of hydrogen ions and changes of species of reactive precursors on growing surface. Surface-mobility activation of reactive precursors by temperature could be a reason of grain-size dependence on the substrate temperature. Microcrystalline-silicon thin-films that could be used for flat-panel electronics such as active-matrix organic-light-emitting-diodes are expected to be fabricated successfully using these results.

• 한국정보통신학회논문지
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• 제11권11호
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• pp.2095-2099
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• 2007

본 연구에서는 LCD, 이미지 센서 등의 개별 소자인 비정질 실리콘 박막 트랜지스터에서 게 이트 유전층 및 절연층으로 사용되는 비정질 질화 실리콘 박막을 사일랜($SiH_4$) 및 암모니아가스를 사용해서 PECVD(Plasma Enhanced Chemical Vapor Deposition) 진공 증착장비로 최적의 비정질질화실리콘 박막 증착 조건을 확립한다. 먼저 반응실의 진공도, rf 전력, $SiH_4$ 및 질소 그리고 암모니아가스의 flow rate를 변화시키면서 형성된 박막의 특성을 조사한다. 계속해서 다른 변수를 고정시킨 상태에서 rf 전력을 변화시키고 다음에는 반응실의 진공도 등을 변화시켜 최적의 증착조건을 확립한다. 이렇게 확립된 증착조건을 사용하여 비정질질화실리콘박막을 제작하여 특성을 측정한 결과 우수한 성능을 나타냈음을 확인하였다.

• 한국진공학회:학술대회논문집
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• 한국진공학회 2016년도 제50회 동계 정기학술대회 초록집
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• pp.346.2-346.2
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• 2016

The rear side contact recombination in the crystalline silicon solar cell could be reduced by back surface field. We formed polycrystalline silicon as a back surface field through crystallization of amorphous silicon. A thin silicon oxide applied to the passivation layer. We used quasi-steady-state photoconductance measurement to analyze electrical properties with various annealing condition. And, blister formed on surface of wafer during the annealing process. We observed the blister after varied annealing process with wafer of various surface. Shape and density of blister is influenced by various annealing temperature and process time. As the annealing temperature became higher, the average diameter of blister is decreased and total number of blister is increased. The sample with the $600^{\circ}C$ annealing temperature and 1 min annealing time exhibited the highest implied open circuit voltage and lifetime. We predicted that the various shape and density of blister affects the lifetime and implied open circuit voltage.

• 한국세라믹학회지
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• 제27권2호
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• pp.219-225
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• 1990

Silicon dioxide thin film has been grown by a chemical vapor deposition (CVD) technique using SiH4, and O2 gaseous mixture on a silicon substrate. The experimental results indicated that the deposition rate as a function of the input ratio (O2/SiH4) shows two regions, increasing region and decreasing region. Also the deposition rate increases with increasing the deposition temperature. The microstructure of deposited silicon dioxide films is amorphous. The experimental results of infrared absorption spectrums indicate that Si-H and Si-OH bond increase with decreasing input ratio, but Si-O bond is independent on the input ratio. The interfacial charge of deposited silicon dioxide decreases with increasing input ratio.

• 한국세라믹학회지
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• 제39권7호
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• pp.622-627
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• 2002

Multi-layer composites consisting of silicon nitride, silicon nitride-silicon carbide and boron nitride-alumina layers were prepared fly stacking the corresponding ceramic tapes. The composites demonstrated self-diagnostic capability and non-catastrophic failure behavior. The composites consisting of many thin layers exhibited high strength and stepwise increase of the electrical resistance during the flexure test. The strength of the composite with too thick silicon nitride layers was low and the electrical resistance was abruptly increased to the detection limit of the digital multi-meter during the test. An extensive crack branching was observed in the weak (BN + Al$_2$O$_3$)layer.

• 통합자연과학논문집
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• 제7권4호
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• pp.221-226
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• 2014

Optically encoded porous silicon smart particles were successfully fabricated from the free-standing porous silicon thin films using ultrasono-method. DBR PSi was prepared by an electrochemical etch of heavily doped $p^{{+}{+}}$-type silicon wafer. DBR PSi was prepared by using a periodic pseudo-square wave current. The surface-modified DBR PSi was prepared by either thermal oxidation or thermal hydrosilylation. Free-standing DBR PSi films were generated by lift-off from the silicon wafer substrate using an electropolishing current. Free-standing DBR PSi films were ultrasonicated to create DBR-structured porous smart particles. Optical characteristics of porous smart particles were measured by FT-IR spectroscopy. The surface morphology of porous smart particles was determined by FE-SEM.

• 한국표면공학회지
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• 제28권3호
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• pp.174-181
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• 1995

Multilayered silicon cantilever beams as interconnection systems for bare chip burn-in socket applications have been designed, fabricated and characterized. Fabrication processes of the beam are employing standard semiconductor processes such as thin film processes and epitaxial layer growth and silicon wet etching techniques. We investigated silicon etch rate in 1-3-10 etchant as functions of doping concentration, surface mechanical stress and crystal defects. The experimental results indicate that silicon etch rate in 1-3-10 etchant is strong functions of doping concentration and crystal defect density rather than surface mechanical stress. We suggested the new fabrication processes of multilayered silicon cantilever beams.

• 한국진공학회:학술대회논문집
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• 한국진공학회 2014년도 제46회 동계 정기학술대회 초록집
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• pp.211.1-211.1
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• 2014

Recently, the scaling of conventional planar NAND flash devices is facing its limits by decreasing numbers of electron stored in the floating gate and increasing difficulties in patterning. Three-dimensional vertical NAND devices have been proposed to overcome these issues. Atomic layer deposition (ALD) is the most promising method to deposit charge trap layer of vertical NAND devices, SiN, with excellent quality due to not only its self-limiting growth characteristics but also low process temperature. ALD of silicon nitride were studied using NH3 and silicon chloride precursors, such as SiCl4[1], SiH2Cl2[2], Si2Cl6[3], and Si3Cl8. However, the reaction mechanism of ALD silicon nitride process was rarely reported. In the present study, we used density functional theory (DFT) method to calculate the reaction of silicon chloride precursors with a silicon nitride surface. DFT is a quantum mechanical modeling method to investigate the electronic structure of many-body systems, in particular atoms, molecules, and the condensed phases. The bond dissociation energy of each precursor was calculated and compared with each other. The different reactivities of silicon chlorides precursors were discussed using the calculated results.

• 한국전기전자재료학회:학술대회논문집
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• 한국전기전자재료학회 1999년도 추계학술대회 논문집
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• pp.391-394
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• 1999

The diamond thin films are deposited on silicon using MPCVD(Microwave Plasma Chemical Vapor Deposition) method at various deposition microwave power and time. Diamond is deposited with 100 sccm H$_2$ and 2 sccm CH$_4$ by MPCVD. The crystallinity of diamond thin films were increased with increase of microwave power. The growth rate of diamond thin films were increased with increase of time.