• Journal of Photoscience
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• v.6 no.4
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• pp.183-186
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• 1999

We have been prepared the porous silicon carbide (PSC) by electrochemical etching of silicon carbide single crystals. Samples of PSC have been studied by the methods of scanning electron microscope (SEM) and photoluminescence (PL). Two PL bands attributed to the blue and green light emission were observed in this study. According to the anodization conditions, the main source of emission in the oxidized layers of PSC lies in the different surface defect centers which consist of different geometrical structures due to the polytypes. It means that origin of these PL bands may be existed in different size pores simultaneously. The present results indicate that the high energy band comes from the top porous layers while the low energy band comes from the lower porous layers.

• Journal of the Korean Institute of Telematics and Electronics
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• v.21 no.1
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• pp.45-50
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• 1984

V-groove N+P solar cell is fabricated by thermal diffusion in silicon wafer with (100) crystal structure. To form the V-grooves in (100) silicon surface, a mixture of etylen-diamine, water, pyrocathecol is used as the etchant of anisotropic etching. Under light intensity of 100mW/$\textrm{cm}^2$, the efficiency of the V-groove solar cell is 2.5-3.5% greater than the conventional N+P solar cell and 0.4-0.6% greater than the texturized one.

• KSTLE International Journal
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• v.9 no.1_2
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• pp.10-12
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• 2008

Silicon micro-patterns were fabricated on Si (100) wafers using photolithography and DRIE (Deep Reactive Ion Etching) fabrication techniques. The patterned shapes included micro-pillars and micro-channels. After the fabrication of the patterns, the patterned surfaces were chemically modified by coating Z-DOL (perfluoropolyether, PFPE) thin films. The surfaces were then evaluated for their micro-friction behavior in comparison with those of bare Si (100) flat, Z-DOL coated Si (100) flat and uncoated Si patterns. Experimental results showed that the chemically treated (Z-DOL coated) patterned surfaces exhibited the lowest values of coefficient of friction when compared to the rest of the test materials. The results indicate that a combination of both the topographical and chemical modification is very effective in reducing the friction property. Combined surface treatments such as these could be useful for tribological applications in miniaturized devices such as Micro/Nano-Electro-Mechanical-Systems (MEMS/NEMS).

• Journal of the Korean Society for Precision Engineering
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• v.23 no.7 s.184
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• pp.138-145
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• 2006

A nanopatterning technique was proposed and demonstrated for low cost and mass productive process using the scanning probe lithography (SPL) and soft lithography. The nanometer scale structure is fabricated by the localized generation of oxide patterning on the H-passivated (100) silicon wafer, and soft lithography was performed to replicate of nanometer scale structures. Both height and width of the silicon oxidation is linear with the applied voltagein SPL, but the growth of width is more sensitive than that of height. The structure below 100 nm was fabricated using HF treatment. To overcome the structure height limitation, aqueous KOH orientation-dependent etching was performed on the H-passivated (100) silicon wafer. Soft lithography is also performed for the master replication process. Elastomeric stamp is fabricated by the replica molding technique with ultrasonic vibration. We showed that the elastomeric stamp with the depth of 60 nm and the width of 428 nm was acquired using the original master by SPL process.

• Korean Journal of Materials Research
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• v.3 no.5
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• pp.482-496
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• 1993

Radiation damage and contamination of silicons etched in the $CF_4+H_2$ and $CHF_3$ magnetron discharges have been characterized using Schottky diode characteristics, TEM, AES, and SIMS as a function of applied magnetic field strength. It turned out that, as the magnetic field strength increased, the radiation damage measured by cross sectional TEM and by leakage current of Schottky diodes decreased colse to that of wet dtched samples especially for $CF_4$ plasma etched samples, For $CF_4+H_2$and $CHF_3$ etched samples, hydrogen from the plasmas introduced extended defects to the silicon and this caused increased leakage current to the samples etched at low magnetic field strength conditions by hydrogen passivation. The thickness of polymer with the increasing magnetic field strength and showed the minimum polymer residue thickness near the 100Gauss where the silicon etch rate was maximum. Also, other contaminants such as target material were found to be minimum on the etched silicon surface near the highest etch rate condition.

• Journal of the Semiconductor & Display Technology
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• v.16 no.1
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• pp.65-69
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• 2017

This paper presents a Technology-CAD (TCAD) simulation of the characteristics of crystalline Si pillar array solar cells. The junction depth and the surface concentration of the solar cells were optimized to obtain the targeted sheet resistance of the emitter region. The diffusion model was determined by calibrating the emitter doping profile of the microscale silicon pillars. The dimension parameters determining the pillar shape, such as width, height, and spacing were varied within a simulation window from ${\sim}2{\mu}m$ to $5{\mu}m$. The simulation showed that increasing pillar width (or diameter) and spacing resulted in the decrease of current density due to surface area loss, light trapping loss, and high reflectance. Although increasing pillar height might improve the chances of light trapping, the recombination loss due to the increase in the carrier's transfer length canceled out the positive effect to the photo-generation component of the current. The silicon pillars were experimentally formed by photoresist patterning and electroless etching. The laboratory results of a fabricated Si pillar solar cell showed the efficiency and the fill factor to be close to the simulation results.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.12 no.1
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• pp.27-34
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• 1999

We investigated the effect of mechanical back side damage in viewpoint of electrical and surface morphological characteristics in Czochralski silicon wafer. The intensity of mechanical damage was evaluated by minority carrier recombination lifetime by laser excitation/microwave reflection photoconductance decay technique, atomic force microscope, optical microscope, wet oxidation/preferential etching methods. The data indicate that the higher the mechanical damage degree, the lower the minority carrier lifetime, and surface roughness, damage depth and density of oxidation induced stacking fault increased proportionally.

• Proceedings of the KIEE Conference
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• 1987.07a
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• pp.481-485
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• 1987

The fabrication of a micro mass flow sensor on a silicon chip by means of micro-machining technology is described on this paper. The operation of micro mass flow sensor is based on the heat transfer from a heated chip to a fluid. The temperature differences on the chip is a measure for the flow velocity in a plane parallel with the chip surface. An anisotropic etching technigue was used for the formation of the V-type groove in this fabrication. The micro mass flow sensor is made up of two main parts ; A thin glass plate embodying the connecting parts and mass flow sensor parts in silicon chip. This sensor have a very small size and a neglible dead space. Micro mass flow sensor can fabricate on silicon chip by micro machining technology too.

• Journal of Surface Science and Engineering
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• v.48 no.3
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• pp.126-130
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• 2015

A high-pressure depletion method using plasma chemical vapor deposition (CVD) is often used to deposit hydrogenated microcrystalline silicon (${\mu}c-Si:H$) films of a low defect density at a high deposition rate. To understand proper deposition conditions of ${\mu}c-Si:H$ films for a high-pressure depletion method, Si films were deposited in a combinatorial way using a multi-hollow discharge plasma CVD method. In this paper the substrate temperature dependence of ${\mu}c-Si:H$ film properties are demonstrated. The higher substrate temperature brings about the higher deposition rate, and the process window of device quality ${\mu}c-Si:H$ films becomes wider until $200^{\circ}C$. This is attributed to competitive reactions between Si etching by H atoms and Si deposition.

• Bulletin of the Korean Chemical Society
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• v.10 no.1
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• pp.30-32
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• 1989

Traces of nine elements, gold, arsenic, cobalt, chromium, copper, europium, hafnium, sodium and antimony in commercially available silicon crystals were determined by the instrumental neutron activation analysis using the single comparator method. The values of the concentrations of these elements in both single and polycrystals were found to decrease significantly to a low limiting level by simply washing and etching surface contaminants having been introduced during various steps of sample preparation and irradiation. However, the chromium levels in polycrystals were not easily decreased, these depending upon the cutting tools employed. The Sb-doped content in each semiconductor has been compared with the associated quantities such as the concentration and the conductivity range given by the sample donor. Uncertainty in the sodium analysis due to the fission neutron reaction by silicon itself was discussed.