• Journal of the Korean Vacuum Society
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• v.21 no.2
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• pp.99-105
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• 2012

We fabricated the textured silicon (Si) surface on Si substrates by the electrochemical etching using gold (Au) nanoparticle catalysts. The antireflective property of the fabricated Si nanostructures was improved. The Au nanoparticles of ~20-150 nm were formed by the rapid thermal annealing using thermally evaporated Au films on Si. In the chemical etching, the aqueous solution containing $H_2O_2$ and HF was used. In order to investigate the effect of electrochemical etching on the etching depth and reflectance characteristics, the sample was immersed in the aqueous etching solution for 1 min with and without applied cathodic voltages of -1 V and -2 V. As a result, the solar weighted reflectance, i.e., the averaged reflectance with considering solar spectrum (air mass 1.5), could be efficiently reduced for the electrochemically etched Si by applying the cathodic voltage of -2 V, which is expected to be useful for Si solar cell applications.

• Journal of the Institute of Electronics Engineers of Korea SD
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• v.41 no.3
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• pp.9-14
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• 2004

In this study, Si anisotropic etching characteristics of tetramethylammonium hydroxide (TMAH)/ ammonium persulfate(AP)/isopropyl alcohol(IPA) solutions were investigated to realize the optimum structure of a diaphragm for the piezoresistive pressure sensor application. Due to its low toxicity and its high compatibility with the CMOS processing, TMAH was used as Si anisotropic etchants. The variations of Si etch rate on the etching temperature, TMAH concentration, and etching time were obtained. With increasing the etching temperature and decreasing TMAH concentrations, the Si etch rate is increased while a significant non-unifonnity exists on the etched surface because of formation of hillocks on the (100) surface. The addition of IPA to TMAH solution leads to smoother etched surfaces but, makes the Si etch rate lower. However, with the addition of AP to TMAH solution, the Si etch rate is increased and an improvement in flatness on the etching front is observed. The Si etch rate is also maximized with increasing the number of addition of AP to TMAH solution per one hour. The Si square membranes of 20${\mu}{\textrm}{m}$ thickness and l00-400${\mu}{\textrm}{m}$ one-side length were fabricated successfully by applying optimum Si etching conditions of TMAH/AP solutions.

• Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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• 2009.06a
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• pp.126-126
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• 2009

Noninvasive plasma diagnostic technique is introduced to analyze and characterize HICP (Helmholtz Inductively Coupled Plasma) source during the plasma etching process. The HICP reactor generates plasma mainly through RF source power at 13.56MHz RF power and RF bias power of 12.56MHz is applied to the cathode to independently control ion density and ion energy. For noninvasive sensors, the RF sensor and the OES (Optical emission spectroscopy) were employed since it is possible to obtain both physical and chemical properties of the reactor with plasma etching. The plasma impedance and optical spectra were observed while altering process parameters such as pressure, gas flow, source and bias power during the poly silicon etching process. In this experiment, we have found that data measured from these noninvasive sensors can be correlated to etch results. In this paper, we discuss the relationship between process parameters and the measurement data from RF sensor and OES such as plasma impedance and optical spectra and using these relationships to analyze and characterize H-ICP source.

• International Journal of Precision Engineering and Manufacturing
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• v.9 no.1
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• pp.25-29
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• 2008

We introduce a new fabrication process for antireflective structured surfaces. A 4-inch silicon wafer was dipped in a suspension of 300-nm-diameter silica particles dispersed in a toluene solution. When the wafer was drawn out of the suspension, a hexagonally packed monolayer structure of particles self-assembled on almost the complete wafer surface. Due to the simple process, this could be applied to micro- and nano-patterning. The self-assembled silica particles worked as a mask for the subsequent reactive ion etching. An array of nanometer-sized pits could be fabricated since the regions that correspond to the small gaps between particles were selectively etched off. As etching progressed, the pits became deeper and combined with neighboring pits due to side-etching to produce an array of cone-like structures. We investigated the effect of etching conditions on antireflection properties, and the optimum shape was a nano-cone with height and spacing of 500 nm and 300 nm, respectively. This nano-structured surface was prepared on a $30\;{\times}\;10-mm$ area. The reflectivity of the surface was reduced 97% for wavelengths in the range 400-700 nm.

• Proceedings of the KIEE Conference
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• 1998.07g
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• pp.2515-2517
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• 1998

The micro fresnel lens(MFL) was modeled and fabricated on a XY-stage electrostatically driven by comb actuator. The modeled MFL was approximated as a step shape with 4-phase and 4-zone plate. The focal length and diameter of the MFL is 20mm and 912${\mu}m$, respectively. The XY-stage suspending the MFL is designed to generate a large static displacement up to about 20${\mu}m$. On SOI substrates, we first fabricated MFL using the RIE(reactive Ion etching) technology and then patterned and etched bulk silicon to make XY-stage. After the fabrication of all structures on top side of the SOI substrates. $Si_3N_4$ was deposited for passivation of all structures using PECVD(plasma enhanced chemical vapor deposition). All the MFL systems width comb drive actuator were released by KOH etching from the bottom side of the SOI wafer using double-sided alignment technique. In fabrication of MFL, a dry etching conditions is established in order to improve surface roughness and to control the etched depth.

• Proceedings of the KIEE Conference
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• 2000.07c
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• pp.2074-2076
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• 2000

In this paper, RFICP equipment is designed and manufactured with the aid of high frequency discharge to produce uniform plasma with high density and large diameter. And $SF_6$ gas is used to investigate plasma characteristics. The electron density and temperature, potential dependence of $SF_6$ plasma in accordance with its operating pressure, gas flux and input power are measured by the method of Langmuir probe. The etching characteristics of the plasma is researched in accordance with operating pressure, gas flux, input power to apply to Silicon Wafer which is used in the field of semiconductor process. The proposed RFICP equipment, in this paper, has relatively excellent etching characteristics, and is thought to be element of oxidization-sheath etching facility in semiconductor manufacturing process.

• Journal of the Semiconductor & Display Technology
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• v.15 no.1
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• pp.17-21
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• 2016

EUV (Extreme Ultraviolet) pellicle which protects a mask from contamination became a critical issue for the application of EUV lithography to high-volume manufacturing. However, researches of EUV pellicle are still delayed due to no typical manufacturing methods for large-scale EUV pellicle. In this study, EUV pellicle membrane manufacturing method using not only KOH (potassium hydroxide) wet etching process but also a water bath was suggested for uniform etchant temperature distribution. KOH wet etching rates according to KOH solution concentration and solution temperature were confirmed and proper etch condition was selected. After KOH wet etching condition was set, $5cm{\times}5cm$ SiNx (silicon nitride) pellicle membrane with 80% EUV transmittance was successfully manufactured. Transmittance results showed the feasibility of wet etching method with water bath as a large-scale EUV pellicle manufacturing method.

• Journal of the Korean Institute of Electrical and Electronic Material Engineers
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• v.17 no.7
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• pp.724-728
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• 2004

This paper describes on RIE(Reactive Ion Etching) characteristics of 3C-SiC(Silicon Carbide) grown on Si(100) wafers. In this work, CHF$_3$ gas was used to form the polymer as a function of a side-wall for excellent anisotropy etching during the RIE process. The ranges of the etch rate were obtained from 60 $\AA$/min to 980 $\AA$/min according to the conditions such as working gas pressure, RF power, distance between electrodes and the $O_2$ addition ratio in working gas pressure. Under the condition such as 100 mTorr of working gas pressure, 200 W of RF power and 30 mm of the distance between electrodes, mesa structures with about 40 of the etch angle were formed, and the vertical structures could be improved with 50 % of $O_2$ addition ratio in reactive gas during the RIE process. As a result of the investigation, we know that it is possible to apply the RIE process of 3C-SiC using CHF$_3$ for the development of electronic parts and MEMS applications in harsh environments.

• Journal of the Microelectronics and Packaging Society
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• v.16 no.4
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• pp.29-32
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• 2009

Dense and periodic arrays of nano-sized holes were patterned in oxide thin film on GaAs substrate. To obtain the nano-size patterns, self-assembling diblock copolymer was used to produce thin film of uniformly distributed parallel cylinders of polymethylmethacrylate (PMMA) in polystyrene (PS) matrix. The PMMA cylinders were removed with UV expose and acetic acid rinse to produce PS nanotemplate. By reactive ion etching, pattern of the PS template was transferred to under laid silicon oxide layer. Transferred patterns were reached to the GaAs substrate by controlling the dry etching time. We confirmed the achievement of etching through the removing oxide layer and observation of GaAs substrate surface. Optimized etching time was 90 to 100 sec. Pore sizes of the nanopattern in the silicon oxide layer were 20~22 nm.

• Transactions on Electrical and Electronic Materials
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• v.10 no.2
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• pp.35-39
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• 2009

A novel Helmholtz coil inductively coupled plasma(H-ICP) etcher is proposed and characterized for deep nano-scale CMOS technology. Various hardware tests are performed while varying key parameters such as distance between the top and bottom coils, the distance between the chamber ceiling and the wafer, and the chamber height in order to determine the optimal design of the chamber and optimal process conditions. The uniformity was significantly improved by applying the optimum conditions. The plasma density obtained with the H-ICP source was about $5{\times}10^{11}/cm^3$, and the electron temperature was about 2-3 eV. The etching selectivity for the poly-silicon gate versus the ultra-thin gate oxide was 482:1 at 10 sccm of $HeO_2$. The proposed H-ICP was successfully applied to form multiple 60-nm poly-silicon gate layers.