• Title/Summary/Keyword: Silicon Wet Etching

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Design of Single-wafer Wet Etching Bath for Silicon Wafer Etching (실리콘 웨이퍼 습식 식각장치 설계 및 공정개발)

  • Kim, Jae Hwan;Lee, Yongil;Hong, Sang Jeen
    • Journal of the Semiconductor & Display Technology
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    • v.19 no.2
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    • pp.77-81
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    • 2020
  • Silicon wafer etching in micro electro mechanical systems (MEMS) fabrication is challenging to form 3-D structures. Well known Si-wet etch of silicon employs potassium hydroxide (KOH), tetramethylammonium hydroxide (TMAH) and sodium hydroxide (NaOH). However, the existing silicon wet etching process has a fatal disadvantage that etching of the back side of the wafer is hard to avoid. In this study, a wet etching bath for 150 mm wafers was designed to prevent back-side etching of silicon wafer, and we demonstrated the optimized process recipe to have anisotropic wet etching of silicon wafer without any damage on the backside. We also presented the design of wet bath for 300 mm wafer processing as a promising process development.

Fabrication of a (100) Silicon Master Using Anisotropic Wet Etching for Embossing

  • Jung, Yu-Min;Kim, Yeong-Cheol
    • Journal of the Korean Ceramic Society
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    • v.42 no.10 s.281
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    • pp.645-648
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    • 2005
  • To fabricate a (100) silicon hard master, we used anisotropic wet etching for the embossing. The etching chemical for the sili­con wafer was a TMAH 25$\%$ solution. The anisotropic wet etching produces a smooth sidewall surface inclined at 54.7°, and the surface roughness of the fabricated master is about 1 nm. After spin coating an organic-inorganic sol-gel hybrid resin on a silicon substrate, we used the fabricated master to form patterns on the silicon substrate. Thus, we successfully obtained patterns via the hot embossing technique with the (100) silicon hard master. Moreover, by using a single hydrophobic surface treatment of the master, we succeeded in achieving uniform surface roughness of the embossed patterns for more than ten embossments.

A study on wet etching for silicon membrane construction formation (실리콘 Membrane 구조 형성을 위한 Wet Etching에 관한 연구)

  • 김동수;정원채
    • Proceedings of the IEEK Conference
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    • 2001.06b
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    • pp.237-240
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    • 2001
  • In this paper, we have presented processing technique about wet etching for silicon membrane construction formation. In order to make selective etching of backside silicon wafer, we used Si$_3$N$_4$ layer by PECVD(Plasma Enhanced Chemical Vapor Deposition). We have measured the surface thickness in backside silicon wafer after anisortropic wet etching with KOH:distilled water solutions. Through this experiment, we acquired the etching rate for 1.29${\mu}{\textrm}{m}$/min. The average rough of Si-membrane frontside and backside was 0.26${\mu}{\textrm}{m}$, 0.90${\mu}{\textrm}{m}$, respectively.

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Investigation of Wet Chemical Etching for Surface Texturing of Multi-crystalline Silicon Wafers (다결정 실리콘 웨이퍼의 표면 텍스쳐링을 위한 습식 화학 식각에 대한 연구)

  • Kim, Bum-Ho;Lee, Hyun-Woo;Lee, Eun-Joo;Lee, Soo-Hong
    • Proceedings of the Korean Institute of Electrical and Electronic Material Engineers Conference
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    • 2006.11a
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    • pp.19-20
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    • 2006
  • Two methods that can reduce reflectance in solar cells are surface texturing and anti-reflection coating. Wet chemical etching is a typical method that surface texturing of multi-crystalline silicon. Wet chemical etching methods are the acid texturization of saw damage on the surface of multi-crystalline silicon or double-step chemical etching after KOH saw damage removal too. These methods of surface texturing are realized by chemical etching in acid solutions HF-$HNO_3$-$H_2O$. In this solutions we can reduce reflectance spectra by simple process etching of multi-crystalline silicon surface. We have obtained reflectance of 27.19% m 400~1100nm from acidic chemical etching after KOH saw damage removal. This result is about 7% less than just saw damage removal substrate. The surface morphology observed by microscope and scanning electron microscopy (SEM).

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Multi-mode Planar Waveguide Fabricated by a (110) Silicon Hard Master

  • Jung, Yu-Min;Kim, Yeong-Cheol
    • Journal of the Korean Institute of Electrical and Electronic Material Engineers
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    • v.18 no.12
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    • pp.1106-1110
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    • 2005
  • We fabricated (110) silicon hard master by using anisotropic wet etching for embossing. The etching chemical for the silicon wafer was a TMAH $25\%$ solution. The anisotropic wet etching produces a smooth sidewall surface and the surface roughness of the fabricated master is about 3 nm. After spin coating an organic-inorganic sol-gel hybrid material on a silicon substrate, we employed hot embossing technique operated at a low pressure and temperature to form patterns on the silicon substrate by using the fabricated master. We successfully fabricated the multi-mode planar optical waveguides showing low propagation loss of 0.4 dB/cm. The surface roughness of embossed patterns was uniform for more than 10 times of the embossing processes with a single hydrophobic surface treatment of the silicon hard master.

Fabrication of Hollow-type Silicon Microneedle Array Using Microfabrication Technology (반도체 미세공정 기술을 이용한 Hollow형 실리콘 미세바늘 어레이의 제작)

  • Kim, Seung-Kook;Chang, Jong-Hyeon;Kim, Byoung-Min;Yang, Sang-Sik;Hwang, In-Sik;Pak, Jung-Ho
    • The Transactions of The Korean Institute of Electrical Engineers
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    • v.56 no.12
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    • pp.2221-2225
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    • 2007
  • Hollow-type microneedle array can be used for painless, continuous and stable drug delivery through a human skin. The needles must be sharp and have sufficient length in order to penetrate the epidermis. An array of hollow-type silicon microneedles was fabricated by using deep reactive ion etching and HNA wet etching with two oxide masks. Isotropic etching was used to create tapered tips of the needles, and anisotropic etching of Bosch process was used to make the extended length and holes of microneedles. The microneedles were formed by three steps of isotropic, anisotropic, and isotropic etching in order. The holes were made by one anisotropic etching step. The fabricated microneedles have $170{\mu}m$ width, $40{\mu}m$ hole diameter and $230{\mu}m$ length.

Surface Analysis and Conversion Efficiency of Multi-crystalline Silicon Solar Cell by Wet Chemical Etching (습식 화학 식각에 의한 다결정 실리콘 웨이퍼의 표면 분석 및 효율 변화)

  • Park, Seok-Gi;Do, Kyeom-Seon;Song, Hee-Eun;Kang, Gi-Hwan;Ahn, Hyung-Keun;Han, Deuk-Young
    • 한국태양에너지학회:학술대회논문집
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    • 2011.04a
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    • pp.111-115
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    • 2011
  • Surface Texturing is an essential process for high efficiency in multi-crystalline silicon solar cell. In order to reduce the reflectivity, there are two major methods; proper surface texturing and anti-reflection coating. For texturization, wet chemical etching is a typical method for multi-crystalline silicon. The chemical solution for wet etching consists of HF, $NHO_3$, DI and $CH_3COOH$. We carried out texturization by the change of etching time like 15sec, 30sec, 45sec, 60sec and measured the reflectivity of textured wafers. As making the silicon solar cells, we obtained the conversion efficiency and relationship between texturing condition and solar cell characteristics. The reflectivity from 300nm to 1200nm was the lowest with 15 sec texturing time and 60 sec texturing time showed almost same reflectivity as bare one. The 45 sec texturing time showed the highest conversion efficiency.

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The Fabrication of Megasonic Agitated Module(MAM) for the Improved Characteristics of Wet Etching

  • Park, Tae-Gyu;Yang, Sang-Sik;Han, Dong-Chul
    • Journal of Electrical Engineering and Technology
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    • v.3 no.2
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    • pp.271-275
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    • 2008
  • The MAM(Megasonic Agitated Module) has been fabricated for improving the characteristics of wet etching. The characteristics of the MAM are investigated during the wet etching with and without megasonic agitation in this paper. The adoption of the MAM has improved the characteristics of wet etching, such as the etch rate, etch uniformity, and surface roughness. Especially, the etching uniformity on the entire wafer was less than ${\pm}1%$ in both cases of Si and glass. Generally, the initial root-mean-square roughness($R_{rms}$) of the single crystal silicon was 0.23nm. Roughnesses of 566nm and 66nm have been achieved with magnetic stirring and ultrasonic agitation, respectively, by some researchers. In this paper, the roughness of the etched Si surface is less than 60 nm. Wet etching of silicon with megasonic agitation can maintain nearly the original surface roughness during etching. The results verified that megasonic agitation is an effective way to improve etching characteristics of the etch rate, etch uniformity, and surface roughness and that the developed micromachining system is suitable for the fabrication of devices with complex structures.

Development of apparatus for Single-sided Wet Etching and its applications in Corrugated Membrane Fabrication

  • Kim, Junsoo;Moon, Wonkyu
    • Journal of Sensor Science and Technology
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    • v.30 no.1
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    • pp.10-14
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    • 2021
  • Wet etching is more economical than dry etching and provides a uniform etching depth regardless of wafer sizes. Typically, potassium hydroxide (KOH) and tetra-methyl-ammonium hydroxide (TMAH) solutions are widely used for the wet etching of silicon. However, there is a limit to the wet etching process when a material deposited on an unetched surface reacts with an etching solution. To solve this problem, in this study, an apparatus was designed and manufactured to physically block the inflow of etchants on the surface using a rubber O-ring. The proposed apparatus includes a heater and a temperature controller to maintain a constant temperature during etching, and the hydrostatic pressure of the etchant is considered for the thin film structure. A corrugation membrane with a diameter of 800 ㎛, thickness of 600 nm, and corrugation depth of 3 ㎛ with two corrugations was successfully fabricated using the prepared device.

Developing Low Cost, High Throughput Si Through Via Etching for LED Substrate (LED용 Si 기판의 저비용, 고생산성 실리콘 관통 비아 식각 공정)

  • Koo, Youngmo;Kim, GuSung;Kim, Sarah Eunkyung
    • Journal of the Microelectronics and Packaging Society
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    • v.19 no.4
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    • pp.19-23
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    • 2012
  • Silicon substrate for light emitting diodes (LEDs) has been the tendency of LED packaging for improving power consumption and light output. In this study, a low cost and high throughput Si through via fabrication has been demonstrated using a wet etching process. Both a wet etching only process and a combination of wet etching and dry etching process were evaluated. The silicon substrate with Si through via fabricated by KOH wet etching showed a good electrical resistance (${\sim}5.5{\Omega}$) of Cu interconnection and a suitable thermal resistance (4 K/W) compared to AlN ceramic substrate.