• 한국태양에너지학회 논문집
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• 제31권1호
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• pp.37-43
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• 2011

In this paper, the optimized doping condition of crystalline silicon solar cells with $156{\times}156\;mm^2$ area was studied. To optimize the drive-in temperature in the doping process, the other conditions except variable drive-in temperature were fixed. These conditions were obtained in previous studies. After etching$7\;{\mu}m$ of the surface to form the pyramidal structure, the silicon nitride deposited by the PECVD had 75~80nm thickness and 2 to 2.1 for a refractive index. The silver and aluminium electrodes for front and back sheet, respectively, were formed by screen-printing method, followed by firing in 400-425-450-550-$850^{\circ}C$ five-zone temperature conditions to make the ohmic contact. Drive-in temperature was changed in range of $830^{\circ}C$ to $890^{\circ}C$to obtain the sheet resistance $30{\sim}70\;{\Omega}/{\box}$ with $10\;\Omega}/{\box}$ intervals. Solar cell made in $890^{\circ}C$ as the drive-in temperature revealed 17.1% conversion efficiency which is best in this study. This solar cells showed $34.4\;mA/cm^2$ of the current density, 627 mV of the open circuit voltage and 79.3% of the fill factor.

• 전자공학회논문지D
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• 제36D권7호
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• pp.17-25
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• 1999

PECVD 법을 이용하여 Tungsten Nitride($WN_x$) 박막을 $WSi_3N_4$ 기판위에 형성하였다. $WN_x$ 박막은 기관온도, 가스의 유량, rf power 등의 공정변수를 변화시키면서 형성되었고, 서로 다른 질소원으로 $NH_3$와 $N_2$를 각각 사용하여 박막의 특성을 조사하였다. $WN_x$ 막 내의 질소함량은 $NH_3$와 $N_2$의 유량에 따라 0~45% 정도로 변화하였으며, $NH_3$를 사용하였을 때, 최고 160nm/min의 높은 성장률을 나타내었다. $WSi_3N_4$ 기판 위에서는 TiN이나 Si 위에서보다 높은 성장률을 나타내었다. $WN_x$ 박막의 순도를 AES로 측정해 본 결과 $NH_3$를 사용했을 때 고순도의 박막을 얻을 수 있었다. XRD 분석으로 순수한 다결정의 W가 비정질의 $WN_x$로 변화되는 것을 알 수 있었으며, 이것은 $WN_x$가 식각 공정시 미세 패턴 형성이 W보다 유리할 것이라는 것을 보여준다. TiN, NiCr, Al 등의 다양한 기판 위에 형성해 본 결과 Al 위에서 최대 $1.6 {\mu}m$의 두꺼운 막이 형성되었다.

• 대한전기학회논문지:시스템및제어부문D
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• 제51권9호
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• pp.423-430
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• 2002

The fabrication and experimentation of multi-channel electrodes which enable detecting and recording of multi-site neuronal signals have been investigated. A multi-channel electrode array was fabricated by depositing 2000${\AA}$ thick Au layer on the 1000${\AA}$ thick Ti adhesion layer on a glass wafer. The metal paths were patterned by wet etching and passivated by depositing a PECVD silicon nitride insulation layer to prevent signals from intermixing or cross-talking. After placing a thin slice of rat cerebellar granule cell in the culture ring located in central portion of the multi-channel electrode plate, a neuronal signal from an electrode which is in contact with the cerebellar granule cell has been detected. It was found that the electrode impedance ranges 200㏀∼1㏁ and the impedance is not changed by cleaning with nitric acid. Also, the impedance is inversely proportion to the exposed electrode area and the cross-talk is negligible when the electrode spacing is bigger than 600$\mu\textrm{m}$. The amplitude and frequency of the measured action potential were 38㎷ and 2㎑, which are typical values. From the experimental results, the fabricated multi-channel electrode array proved to be suitable for multi-site neuronal signal detection for the analysis of a complicated cell network.

• 한국전기전자재료학회논문지
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• 제14권1호
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• pp.1-5
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• 2001

STI(shallow trench isolation)-CMP(chemical mechanical polishing) process have been substituted for LOCOS(local oxidation of silicon) process to obtain global planarization in the below sub-0.5㎛ technology. However TI-CMP process, especially TI-CMP with RIE(reactive ion etching) etch back process, has some kinds of defect like nitride residue, torn oxide defect, etc. In this paper, we studied how to reduced torn oxide defects after STI-CMP with RIE etch back processed. Although torn oxide defects which can occur on trench area is not deep and not severe, torn oxide defects on moat area is not deep and not severe, torn oxide defects on moat area is sometimes very deep and makes the yield loss. Thus, we did test on pattern wafers which go through trench process, APECVD process, and RIE etch back process by using an IPEC 472 polisher, IC1000/SUVA4 PAD and KOH base slurry to reduce the number of torn defects and to study what is the origin of torn oxide defects.

• 한국표면공학회:학술대회논문집
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• 한국표면공학회 2009년도 춘계학술대회 논문집
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• pp.250-251
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• 2009

For the fabrication of a multilevel resist (MLR) based on a very thin amorphous carbon (a-C) layer an $Si_{3}N_{4}$ hard-mask layer, the selective etching of the $Si_{3}N_{4}$ layer using physical-vapor-deposited (PVD) a-C mask was investigated in a dual-frequency superimposed capacitively coupled plasma etcher by varying the following process parameters in $CH_{2}F_{2}/H_{2}/Ar$ plasmas : HF/LF powr ratio ($P_{HF}/P_{LF}$), and $CH_{2}F_{2}$ and $H_2$ flow rates. It was found that infinitely high etch selectivities of the $Si_{3}N_{4}$ layers to the PVD a-C on both the blanket and patterned wafers could be obtained for certain gas flow conditions. The $H_2$ and $CH_{2}F_{2}$ flow ratio was found to play a critical role in determining the process window for infinite $Si_{3}N_{4}$/PVDa-C etch selectivity, due to the change in the degree of polymerization. Etching of ArF PR/BARC/$SiO_x$/PVDa-C/$Si_{3}N_{4}$ MLR structure supported the possibility of using a very thin PVD a-C layer as an etch-mask layer for the $Si_{3}N_{4}$ layer.

• 한국재료학회지
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• 제21권5호
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• pp.243-249
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• 2011

To reduce manufacturing costs of crystalline silicon solar cells, silicon wafers have become thinner. In relation to this, the properties of the aluminium-back surface field (Al-BSF) are considered an important factor in solar cell performance. Generally, screen-printing and a rapid thermal process (RTP) are utilized together to form the Al-BSF. This study evaluates Al-BSF formation on a (111) textured back surface compared with a (100) flat back surface with variation of ramp up rates from 18 to $89^{\circ}C$/s for the RTP annealing conditions. To make different back surface morphologies, one side texturing using a silicon nitride film and double side texturing were carried out. After aluminium screen-printing, Al-BSF formed according to the RTP annealing conditions. A metal etching process in hydrochloric acid solution was carried out to assess the quality of Al-BSF. Saturation currents were calculated by using quasi-steady-state photoconductance. The surface morphologies observed by scanning electron microscopy and a non-contacting optical profiler. Also, sheet resistances and bulk carrier concentration were measured by a 4-point probe and hall measurement system. From the results, a faster ramp up during Al-BSF formation yielded better quality than a slower ramp up process due to temperature uniformity of silicon and the aluminium surface. Also, in the Al-BSF formation process, the (111) textured back surface is significantly affected by the ramp up rates compared with the (100) flat back surface.

• 한국자기학회지
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• 제16권1호
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• pp.75-78
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• 2006

텅스턴-보론-카본질소 화합물 박막(W-B-C-N)을 만들기 위하여 박막내에 보론과 카본 그리고 질소의 불순물을 주입한 다음 결정구조를 조사하였으며, 이러한 박막의 식각 특성을 조사하기 위하여 고온에서 열처리한 다음 Cu박막을 W-B-C-N 박막위에 증착한 다음에 열처리하였고 여기에서 열적인 특성을 조사하였다. $1000\;{\AA}$의 박막을 RF magnetron sputtering방법을 이용하여 증착한 후에 박막의 전기적구조적인 특성을 측정하였으며, scratch test를 통해 박막의 결합력을 측정하였고, XRD측정을 통하여 결정성을 조사하였으며, 열처리한 후 etching을 하여 nomarski 현미경을 통하여 확산방지막의 안정성을 조사하였다. 이로부터 확산방지막내의 보론과 카본 질소 등의 불순물이 들어감에 따라 Cu가 Si 속으로 얼마나 들어가는가를 효과적으로 조사하였다. W-B-C-N 확산방지막의 역할은 $850^{\circ}C$까지 고온 열처리를 하는 경우에 Cu 원자가 Si 속으로 확산되어 나가는 것을 효과적으로 방지하는 것을 알 수 있었다. 텅스텐-보론-카본질소 화합물 박막의 비저항은 질소 가스의 유량비를 조절함으로써 쉽게 조절할 수 있었으며, 텅스텐-보론-카본-질소 화합물 박막은 Cu 확산방지막으로 적용했을 때 적절한 질소 농도가 들어간 확산방지막에서는 효과적으로 Cu의 확산을 방지하는 것을 알 수 있었다.

• 공업화학
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• 제24권1호
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• pp.31-37
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• 2013

텍스쳐링에 의해 실리콘 웨이퍼의 표면반사율을 감소시키는 것은 실리콘 태양전지의 효율향상을 위해 매우 중요한 공정이다. 본 연구에서는 에칭속도 제어를 위해 촉매제를 포함한 산 용액으로 텍스쳐링 처리한 웨이퍼의 표면효과와 그 태양전지 특성을 평가 고찰하였다. 텍스쳐링 전 $HNO_3-H_2O_2-H_2O$ 용액의 전처리는 표면반사율의 초기 저감효과를 가져왔다. 이는 산화특성에 의해 유기 불순물이 제거되고 텍스쳐링을 위한 핵의 생성에 기인한다고 할 수 있다. 이후 공정에서 불산/질산 용액에 인산 및 초산과 같은 완충제를 첨가한 혼합용액을 제조하고, 적정 농도 조합과 그 처리시간의 최적화를 통해 개선된 텍스쳐링 효과를 얻을 수 있었으며 이 효과는 표면반사율 감소를 통해 확인할 수 있었다. 이렇게 제조된 실리콘 웨이퍼에 반사방지막 코팅 후 태양전지를 제작하여 그 변환효율을 측정한 결과 16.4%의 양호한 특성을 나타냈다. 이는 개선된 텍스쳐링 처리에 의해 저감된 표면특성에 의한 단락전류의 증가에 기인한 것으로 추정된다.

• 한국진공학회:학술대회논문집
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• 한국진공학회 2011년도 제40회 동계학술대회 초록집
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• pp.210-210
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• 2011

The effects of CH2F2 and N2 gas flow rates on the etch selectivity of silicon nitride (Si3N4) layers to extreme ultra-violet (EUV) resist and the variation of the line edge roughness (LER) of the EUV resist and Si3N4 pattern were investigated during etching of a Si3N4/EUV resist structure in dual-frequency superimposed CH2F2/N2/Ar capacitive coupled plasmas (DFS-CCP). The flow rates of CH2F2 and N2 gases played a critical role in determining the process window for ultra-high etch selectivity of Si3N4/EUV resist due to disproportionate changes in the degree of polymerization on the Si3N4 and EUV resist surfaces. Increasing the CH2F2 flow rate resulted in a smaller steady state CHxFy thickness on the Si3N4 and, in turn, enhanced the Si3N4 etch rate due to enhanced SiF4 formation, while a CHxFy layer was deposited on the EUV resist surface protecting the resist under certain N2 flow conditions. The LER values of the etched resist tended to increase at higher CH2F2 flow rates compared to the lower CH2F2 flow rates that resulted from the increased degree of polymerization.